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Searched refs:IsZeroExt (Results 1 – 4 of 4) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAG.cpp82 bool IsZeroExt = (ExtType == ISD::ZEXTLOAD || ExtType == ISD::EXTLOAD); in INITIALIZE_PASS() local
88 if (IsZeroExt) in INITIALIZE_PASS()
94 if (IsZeroExt) in INITIALIZE_PASS()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp14161 auto IsZeroExt = [&](SDValue Op) { in PerformMVEVMULLCombine() local
14198 if (SDValue Op0 = IsZeroExt(N0)) { in PerformMVEVMULLCombine()
14199 if (SDValue Op1 = IsZeroExt(N1)) { in PerformMVEVMULLCombine()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp10170 bool IsZeroExt = LeftOp.getOpcode() == ISD::ZERO_EXTEND; in combineShiftToMULH() local
10172 if (!IsSignExt && !IsZeroExt) in combineShiftToMULH()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp55687 auto IsExt64 = [&DAG](SDValue Op, bool IsZeroExt) { in combineScalarToVector() argument
55690 unsigned Opc = IsZeroExt ? ISD::ZERO_EXTEND : ISD::ANY_EXTEND; in combineScalarToVector()
55694 unsigned Ext = IsZeroExt ? ISD::ZEXTLOAD : ISD::EXTLOAD; in combineScalarToVector()
55699 if (IsZeroExt) { in combineScalarToVector()