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Searched refs:IsZero (Results 1 – 25 of 26) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64PostLegalizerLowering.cpp932 return [LHS, RHS, IsZero, DstTy](MachineIRBuilder &MIB) { in getVectorFCMP()
933 auto FCmp = IsZero in getVectorFCMP()
939 return [LHS, RHS, IsZero, DstTy](MachineIRBuilder &MIB) { in getVectorFCMP()
940 return IsZero in getVectorFCMP()
946 return [LHS, RHS, IsZero, DstTy](MachineIRBuilder &MIB) { in getVectorFCMP()
947 return IsZero in getVectorFCMP()
954 return IsZero in getVectorFCMP()
961 return IsZero in getVectorFCMP()
968 return IsZero in getVectorFCMP()
1018 if (Pred == CmpInst::Predicate::FCMP_ORD && IsZero) { in applyLowerVectorFCMP()
[all …]
H A DAArch64InstructionSelector.cpp2289 bool IsZero = false; in earlySelect() local
2291 IsZero = I.getOperand(1).getCImm()->isZero(); in earlySelect()
2293 IsZero = I.getOperand(1).getImm() == 0; in earlySelect()
2295 if (!IsZero) in earlySelect()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/MCA/
H A DInstruction.h351 bool IsZero; variable
359 IsZero(false), IndependentFromDef(false) {} in ReadState()
381 bool isReadZero() const { return IsZero; } in isReadZero()
382 void setReadZero() { IsZero = true; } in setReadZero()
/freebsd-14.2/contrib/llvm-project/lldb/source/Utility/
H A DScalar.cpp144 bool Scalar::IsZero() const { in IsZero() function in Scalar
539 !rhs.IsZero()) { in operator /()
599 if (!rhs.IsZero() && result.m_type == Scalar::e_int) { in operator %()
/freebsd-14.2/contrib/llvm-project/lldb/include/lldb/DataFormatters/
H A DFormattersHelpers.h98 bool IsZero() const { in IsZero() function
/freebsd-14.2/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM64/
H A DEmulateInstructionARM64.cpp77 static inline bool IsZero(uint64_t x) { return x == 0; } in IsZero() function
572 proc_state.Z = IsZero(result); in AddWithCarry()
1135 if IsZero(operand1) == iszero then in EmulateCBZ()
/freebsd-14.2/contrib/llvm-project/lldb/include/lldb/Utility/
H A DScalar.h95 bool IsZero() const;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.h1458 bool storeOfVectorConstantIsCheap(bool IsZero, EVT MemVT, unsigned NumElem, in storeOfVectorConstantIsCheap() argument
1462 return IsZero || NumElem > 2; in storeOfVectorConstantIsCheap()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.h225 bool storeOfVectorConstantIsCheap(bool IsZero, EVT MemVT,
H A DAMDGPUISelLowering.cpp917 bool AMDGPUTargetLowering:: storeOfVectorConstantIsCheap(bool IsZero, EVT MemVT, in storeOfVectorConstantIsCheap() argument
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h603 bool storeOfVectorConstantIsCheap(bool IsZero, EVT MemVT, unsigned NumElem, in storeOfVectorConstantIsCheap() argument
/freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineCompares.cpp3547 bool IsZero = C.isZero(); in foldICmpEqIntrinsicWithConstant() local
3548 if (IsZero || C == BitWidth) in foldICmpEqIntrinsicWithConstant()
3550 IsZero ? Constant::getNullValue(Ty) in foldICmpEqIntrinsicWithConstant()
5468 std::optional<bool> IsZero = std::nullopt; in foldICmpEquality() local
5471 IsZero = false; in foldICmpEquality()
5476 IsZero = true; in foldICmpEquality()
5478 if (IsZero && isKnownToBeAPowerOfTwo(A, /* OrZero */ true, /*Depth*/ 0, &I)) in foldICmpEquality()
5484 *IsZero ? A in foldICmpEquality()
H A DInstCombineAndOrXor.cpp2227 Value *IsZero = Builder.CreateICmpEQ(X, ConstantInt::get(Ty, 0)); in visitAnd() local
2228 return new ZExtInst(IsZero, Ty); in visitAnd()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp2674 auto IsZero = [] (const MachineOperand &Op) { in simplifyRCmp0() local
2706 bool KnownZ1 = IsZero(Src1), KnownZ2 = IsZero(Src2); in simplifyRCmp0()
H A DHexagonISelLoweringHVX.cpp2105 SDValue IsZero = in LowerHvxFunnelShift() local
2116 return DAG.getNode(ISD::SELECT, dl, InpTy, {IsZero, (IsLeft ? A : B), Or}); in LowerHvxFunnelShift()
2869 SDValue IsZero = DAG.getSetCC(dl, PredTy, Op0, Zero, ISD::SETEQ); in ExpandHvxIntToFp() local
2890 SDValue Flt1 = DAG.getNode(ISD::VSELECT, dl, InpTy, {IsZero, Zero, Flt0}); in ExpandHvxIntToFp()
/freebsd-14.2/contrib/llvm-project/lldb/source/Expression/
H A DIRInterpreter.cpp1001 if (!C.IsZero()) in Interpret()
H A DDWARFExpression.cpp1450 if (tmp.ResolveValue(exe_ctx).IsZero()) { in Evaluate()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h625 virtual bool storeOfVectorConstantIsCheap(bool IsZero, EVT MemVT, in storeOfVectorConstantIsCheap() argument
628 return IsZero; in storeOfVectorConstantIsCheap()
/freebsd-14.2/contrib/llvm-project/clang/lib/CodeGen/
H A DMicrosoftCXXABI.cpp3053 llvm::Value *IsZero = Builder.CreateICmp(Eq, L0, Zero, "memptr.cmp.iszero"); in EmitMemberPointerComparison() local
3054 Res = Builder.CreateBinOp(Or, Res, IsZero); in EmitMemberPointerComparison()
H A DCGBuiltin.cpp1823 Value *IsZero = Builder.CreateICmpEQ(ArgValue, ArgZero); in EmitMSVCBuiltinExpr() local
1825 Builder.CreateCondBr(IsZero, End, NotZero); in EmitMSVCBuiltinExpr()
3178 Value *IsZero = Builder.CreateICmpEQ(ArgValue, Zero, "iszero"); in EmitBuiltinExpr() local
3179 Value *Result = Builder.CreateSelect(IsZero, Zero, Tmp, "ffs"); in EmitBuiltinExpr()
3900 Value *IsZero = Builder.CreateFCmpOEQ(V, Constant::getNullValue(Ty), in EmitBuiltinExpr() local
3904 Builder.CreateCondBr(IsZero, End, NotZero); in EmitBuiltinExpr()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp13932 if (IsZero) in EmitVectorComparison()
13939 if (IsZero) in EmitVectorComparison()
13943 if (IsZero) in EmitVectorComparison()
13947 if (IsZero) in EmitVectorComparison()
13956 if (IsZero) in EmitVectorComparison()
13976 if (IsZero) in EmitVectorComparison()
13983 if (IsZero) in EmitVectorComparison()
13987 if (IsZero) in EmitVectorComparison()
13991 if (IsZero) in EmitVectorComparison()
13997 if (IsZero) in EmitVectorComparison()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp5079 auto IsZero = MIRBuilder.buildICmp(ICmpInst::ICMP_EQ, CondTy, Amt, Zero); in narrowScalarShift() local
5097 HalfTy, IsZero, InH, MIRBuilder.buildSelect(HalfTy, IsShort, HiS, HiL)); in narrowScalarShift()
5124 HalfTy, IsZero, InL, MIRBuilder.buildSelect(HalfTy, IsShort, LoS, LoL)); in narrowScalarShift()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DLoopVectorize.cpp2844 auto *IsZero = Builder.CreateICmpEQ(R, ConstantInt::get(R->getType(), 0)); in getOrCreateVectorTripCount() local
2845 R = Builder.CreateSelect(IsZero, Step, R); in getOrCreateVectorTripCount()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp5965 bool IsZero = isNullOrNullSplat(LR); in foldLogicOfSetCCs() local
5969 bool AndEqZero = IsAnd && CC1 == ISD::SETEQ && IsZero; in foldLogicOfSetCCs()
5973 bool OrNeZero = !IsAnd && CC1 == ISD::SETNE && IsZero; in foldLogicOfSetCCs()
5975 bool OrLtZero = !IsAnd && CC1 == ISD::SETLT && IsZero; in foldLogicOfSetCCs()
5990 bool AndLtZero = IsAnd && CC1 == ISD::SETLT && IsZero; in foldLogicOfSetCCs()
/freebsd-14.2/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM/
H A DEmulateInstructionARM.cpp2887 if nonzero ^ IsZero(R[n]) then in EmulateCB()

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