| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineOperand.h | 132 unsigned IsUndef : 1; variable 406 return IsUndef; in isUndef() 532 IsUndef = Val; 851 Op.IsUndef = isUndef;
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| H A D | MachineInstr.h | 1677 void setRegisterDefReadUndef(Register Reg, bool IsUndef = true);
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIShrinkInstructions.cpp | 314 bool IsUndef = true; in shrinkMIMG() local 335 IsUndef = false; in shrinkMIMG() 369 MI.getOperand(VAddr0Idx).setIsUndef(IsUndef); in shrinkMIMG() 537 const bool IsUndef = SrcReg->isUndef(); in shrinkScalarLogicOp() local 546 /*isDead*/ false, IsUndef); in shrinkScalarLogicOp()
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| H A D | GCNHazardRecognizer.cpp | 1135 bool IsUndef = Src0->isUndef(); in fixVcmpxPermlaneHazards() local 1138 .addReg(Reg, RegState::Define | (IsUndef ? RegState::Dead : 0)) in fixVcmpxPermlaneHazards() 1139 .addReg(Reg, IsUndef ? RegState::Undef : RegState::Kill); in fixVcmpxPermlaneHazards()
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| H A D | SIInstrInfo.cpp | 2293 bool IsUndef = MI.getOperand(1).isUndef(); in expandPostRAPseudo() local 2302 .addReg(VecReg, RegState::Implicit | (IsUndef ? RegState::Undef : 0)); in expandPostRAPseudo() 2325 bool IsUndef = MI.getOperand(1).isUndef(); in expandPostRAPseudo() local 2341 RegState::Implicit | (IsUndef ? RegState::Undef : 0)); in expandPostRAPseudo() 2370 bool IsUndef = MI.getOperand(1).isUndef(); in expandPostRAPseudo() local 2382 .addReg(VecReg, RegState::Implicit | (IsUndef ? RegState::Undef : 0)); in expandPostRAPseudo() 2695 bool IsUndef = RegOp.isUndef(); in swapRegAndNonRegOperand() local 2711 NonRegOp.ChangeToRegister(Reg, false, false, IsKill, IsDead, IsUndef, IsDebug); in swapRegAndNonRegOperand()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.h | 237 bool matchCombineConcatVectors(MachineInstr &MI, bool &IsUndef, 241 void applyCombineConcatVectors(MachineInstr &MI, bool IsUndef,
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| /freebsd-14.2/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | TargetBuiltins.h | 308 bool isUndef() const { return Flags & IsUndef; } in isUndef()
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| H A D | arm_sve_sme_incl.td | 217 def IsUndef : FlagType<0x80000000>; // Codegen `undef` of given type.
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| H A D | arm_sve.td | 1279 def SVUNDEF_1 : SInst<"svundef_{d}", "dv", "csilUcUsUiUlhfd", MergeNone, "", [IsUndef, IsStreaming… 1280 def SVUNDEF_2 : SInst<"svundef2_{d}", "2v", "csilUcUsUiUlhfd", MergeNone, "", [IsUndef, IsStreaming… 1281 def SVUNDEF_3 : SInst<"svundef3_{d}", "3v", "csilUcUsUiUlhfd", MergeNone, "", [IsUndef, IsStreaming… 1282 def SVUNDEF_4 : SInst<"svundef4_{d}", "4v", "csilUcUsUiUlhfd", MergeNone, "", [IsUndef, IsStreaming… 1289 def SVUNDEF_1_BF16 : SInst<"svundef_{d}", "dv", "b", MergeNone, "", [IsUndef, IsStreamingCompatibl… 1290 def SVUNDEF_2_BF16 : SInst<"svundef2_{d}", "2v", "b", MergeNone, "", [IsUndef, IsStreamingCompatibl… 1291 def SVUNDEF_3_BF16 : SInst<"svundef3_{d}", "3v", "b", MergeNone, "", [IsUndef, IsStreamingCompatibl… 1292 def SVUNDEF_4_BF16 : SInst<"svundef4_{d}", "4v", "b", MergeNone, "", [IsUndef, IsStreamingCompatibl… 1333 …def SVUNDEF_2_B: Inst<"svundef2_b", "2", "Pc", MergeNone, "", [IsUndef, IsStreamingCompatible], []… 1334 …def SVUNDEF_4_B: Inst<"svundef4_b", "4", "Pc", MergeNone, "", [IsUndef, IsStreamingCompatible], []…
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| /freebsd-14.2/contrib/llvm-project/clang/lib/Lex/ |
| H A D | Preprocessor.cpp | 1466 bool IsUndef) const { in emitFinalMacroWarning() 1473 << Identifier.getIdentifierInfo() << (IsUndef ? 0 : 1); in emitFinalMacroWarning()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 224 bool IsUndef = false; in tryCombineConcatVectors() local 226 if (matchCombineConcatVectors(MI, IsUndef, Ops)) { in tryCombineConcatVectors() 227 applyCombineConcatVectors(MI, IsUndef, Ops); in tryCombineConcatVectors() 233 bool CombinerHelper::matchCombineConcatVectors(MachineInstr &MI, bool &IsUndef, in matchCombineConcatVectors() argument 237 IsUndef = true; in matchCombineConcatVectors() 249 IsUndef = false; in matchCombineConcatVectors() 279 MachineInstr &MI, bool IsUndef, const ArrayRef<Register> Ops) { in applyCombineConcatVectors() argument 292 if (IsUndef) in applyCombineConcatVectors()
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| H A D | LegalizerHelper.cpp | 5941 const bool IsUndef = MI.getOpcode() == TargetOpcode::G_CTLZ_ZERO_UNDEF; in narrowScalarCTLZ() local 5949 auto LoCTLZ = IsUndef ? in narrowScalarCTLZ() 5974 const bool IsUndef = MI.getOpcode() == TargetOpcode::G_CTTZ_ZERO_UNDEF; in narrowScalarCTTZ() local 5982 auto HiCTTZ = IsUndef ? in narrowScalarCTTZ()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineInstr.cpp | 2065 void MachineInstr::setRegisterDefReadUndef(Register Reg, bool IsUndef) { in setRegisterDefReadUndef() argument 2069 MO.setIsUndef(IsUndef); in setRegisterDefReadUndef()
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| H A D | RegisterCoalescer.cpp | 1795 bool IsUndef = true; in addUndefFlag() local 1800 IsUndef = false; in addUndefFlag() 1804 if (IsUndef) { in addUndefFlag()
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| H A D | MachineOperand.cpp | 300 IsUndef = isUndef; in ChangeToRegister()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 810 bool IsUndef = true; in buildHvxVectorReg() local 814 IsUndef = false; in buildHvxVectorReg() 820 if (IsUndef) in buildHvxVectorReg()
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| /freebsd-14.2/contrib/llvm-project/clang/include/clang/Lex/ |
| H A D | Preprocessor.h | 2861 void emitFinalMacroWarning(const Token &Identifier, bool IsUndef) const;
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | InstructionSimplify.cpp | 5584 bool IsUndef = Q.isUndefValue(V); in simplifyFPOp() local 5589 if (FMF.noNaNs() && (IsNan || IsUndef)) in simplifyFPOp() 5591 if (FMF.noInfs() && (IsInf || IsUndef)) in simplifyFPOp() 5599 if (IsUndef) in simplifyFPOp()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 4932 bool IsUndef = true; in loadRegPairFromStackSlot() local 4938 IsUndef = false; in loadRegPairFromStackSlot() 4941 .addReg(DestReg0, RegState::Define | getUndefRegState(IsUndef), SubIdx0) in loadRegPairFromStackSlot() 4942 .addReg(DestReg1, RegState::Define | getUndefRegState(IsUndef), SubIdx1) in loadRegPairFromStackSlot()
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| /freebsd-14.2/contrib/llvm-project/clang/lib/Serialization/ |
| H A D | ASTReader.cpp | 614 bool IsUndef = PPOpts.Macros[I].second; in collectMacroDefinitions() local 621 if (IsUndef) { in collectMacroDefinitions() 6177 bool IsUndef = Record[Idx++]; in ParsePreprocessorOptions() local 6178 PPOpts.Macros.push_back(std::make_pair(Macro, IsUndef)); in ParsePreprocessorOptions()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 3673 bool IsUndef = Values[i] < 0 && IsMask; in getConstVector() local 3674 SDValue OpNode = IsUndef ? DAG.getUNDEF(EltVT) : in getConstVector() 3678 Ops.push_back(IsUndef ? DAG.getUNDEF(EltVT) : in getConstVector()
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