Searched refs:IsSubVecPartReg (Results 1 – 2 of 2) sorted by relevance
2021 bool IsSubVecPartReg = SubVecLMUL == RISCVII::VLMUL::LMUL_F2 || in Select() local2024 (void)IsSubVecPartReg; // Silence unused variable warning without asserts. in Select()2025 assert((!IsSubVecPartReg || V.isUndef()) && in Select()
9450 bool IsSubVecPartReg = SubVecLMUL == RISCVII::VLMUL::LMUL_F2 || in lowerINSERT_SUBVECTOR() local9466 if (RemIdx == 0 && (!IsSubVecPartReg || Vec.isUndef())) in lowerINSERT_SUBVECTOR()