Searched refs:IsRegCall (Results 1 – 3 of 3) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/clang/lib/CodeGen/Targets/ |
| H A D | X86.cpp | 781 if ((IsRegCall || IsVectorCall) && in classifyArgumentType()
1982 if (!IsRegCall && Size > 512) in classify()
2696 classify(Ty, 0, Lo, Hi, isNamedArg, IsRegCall); in classifyArgumentType()
2902 unsigned FreeIntRegs = IsRegCall ? 11 : 6; in computeInfo()
2903 unsigned FreeSSERegs = IsRegCall ? 16 : 8; in computeInfo()
2948 if (IsRegCall && it->type->isStructureOrClassType()) in computeInfo()
3247 if ((IsVectorCall || IsRegCall) && in classify()
3249 if (IsRegCall) { in classify()
3341 bool IsRegCall = CC == llvm::CallingConv::X86_RegCall; in computeInfo() local
3355 } else if (IsRegCall) { in computeInfo()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 646 bool IsRegCall = false; in LowerCall() local
656 IsRegCall = true; in LowerCall()
669 IsRegCall = true; in LowerCall()
678 IsRegCall = true; in LowerCall()
704 return DAG.getNode(IsRegCall ? CSKYISD::TAILReg : CSKYISD::TAIL, DL, in LowerCall()
708 Chain = DAG.getNode(IsRegCall ? CSKYISD::CALLReg : CSKYISD::CALL, DL, NodeTys, in LowerCall()
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| /freebsd-14.2/contrib/llvm-project/clang/lib/AST/ |
| H A D | ItaniumMangle.cpp | 1538 bool IsRegCall = FD && in mangleUnqualifiedName() local
1546 else if (IsRegCall) in mangleUnqualifiedName()
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