| /freebsd-14.2/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | CodeGenIntrinsics.h | 163 std::vector<CodeGenIntrinsic> Intrinsics; variable 176 bool empty() const { return Intrinsics.empty(); } in empty() 177 size_t size() const { return Intrinsics.size(); } in size() 178 auto begin() const { return Intrinsics.begin(); } in begin() 179 auto end() const { return Intrinsics.end(); } in end() 180 CodeGenIntrinsic &operator[](size_t Pos) { return Intrinsics[Pos]; } 182 return Intrinsics[Pos];
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| H A D | CodeGenIntrinsics.cpp | 38 Intrinsics.reserve(Defs.size()); in CodeGenIntrinsicTable() 41 Intrinsics.push_back(CodeGenIntrinsic(Defs[I], DefaultProperties)); in CodeGenIntrinsicTable() 43 llvm::sort(Intrinsics, in CodeGenIntrinsicTable() 49 for (size_t I = 0, E = Intrinsics.size(); I < E; ++I) in CodeGenIntrinsicTable() 50 if (Intrinsics[I].TargetPrefix != Targets.back().Name) { in CodeGenIntrinsicTable() 52 Targets.push_back({Intrinsics[I].TargetPrefix, I, 0}); in CodeGenIntrinsicTable() 54 Targets.back().Count = Intrinsics.size() - Targets.back().Offset; in CodeGenIntrinsicTable()
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| H A D | CodeGenDAGPatterns.h | 1109 CodeGenIntrinsicTable Intrinsics; variable 1167 for (unsigned i = 0, e = Intrinsics.size(); i != e; ++i) in getIntrinsic() 1168 if (Intrinsics[i].TheDef == R) return Intrinsics[i]; in getIntrinsic() 1173 if (IID-1 < Intrinsics.size()) in getIntrinsicInfo() 1174 return Intrinsics[IID-1]; in getIntrinsicInfo() 1179 for (unsigned i = 0, e = Intrinsics.size(); i != e; ++i) in getIntrinsicID() 1180 if (Intrinsics[i].TheDef == R) return i; in getIntrinsicID()
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| H A D | SearchableTableEmitter.cpp | 93 DenseMap<Init *, std::unique_ptr<CodeGenIntrinsic>> Intrinsics; member in __anon359b3b5d0111::SearchableTableEmitter 145 std::unique_ptr<CodeGenIntrinsic> &Intr = Intrinsics[I]; in getIntrinsic()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/ |
| H A D | module.install.modulemap | 20 textual header "llvm/IR/Intrinsics.gen" 21 textual header "llvm/IR/Intrinsics.inc"
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | Intrinsics.td | 1 //===- Intrinsics.td - Defines all LLVM intrinsics ---------*- tablegen -*-===// 697 //===--------------- Variable Argument Handling Intrinsics ----------------===// 705 //===------------------- Garbage Collection Intrinsics --------------------===// 717 //===------------------- ObjC ARC runtime Intrinsics --------------------===// 1615 //===------------------------ Coroutine Intrinsics ---------------===// 1618 // Coroutine Structure Intrinsics. 1679 // Coroutine Manipulation Intrinsics. 1690 // Coroutine Lowering Intrinsics. Used internally by coroutine passes. 1736 // Intrinsics to support half precision floating point format 1772 //===---------------- Vector Predication Intrinsics --------------===// [all …]
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| H A D | IntrinsicsXCore.td | 94 // Intrinsics for events. 104 // Intrinsics for threads.
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| H A D | IntrinsicsSPIRV.td | 38 // Expect, Assume Intrinsics
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| H A D | IntrinsicsPowerPC.td | 50 // Intrinsics for [double]word extended forms of divide instructions 148 // Intrinsics defined to maintain XL compatibility 670 // P10 Move to VSR with Mask Intrinsics. 690 // P10 Vector String Isolate Intrinsics. 699 // Predicate Intrinsics: The first operand specifies interpretation of CR6. 1176 // Power8 Intrinsics 1249 // Vector Divide Extended Intrinsics. 1257 // Vector Multiply High Intrinsics.
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| H A D | IntrinsicsAArch64.td | 508 // v8.6-A Matrix Multiply Intrinsics 522 // v8.6-A Bfloat Intrinsics 763 // SHA3 Intrinsics taking 3 arguments 861 // Memory Tagging Extensions (MTE) Intrinsics 912 // Memory Operations (MOPS) Intrinsics 919 // Transactional Memory Extension (TME) Intrinsics 2757 // Scalable Matrix Extension (SME) Intrinsics 2955 // SME2 Intrinsics
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| H A D | IntrinsicsAMDGPU.td | 138 // ABI Special Intrinsics 211 // Instruction Intrinsics 2430 // CI+ Intrinsics 2442 // VI Intrinsics 2497 // GFX9 Intrinsics 2520 // GFX10 Intrinsics 2571 // GFX11 Intrinsics 2673 // GFX12 Intrinsics 3167 // Special Intrinsics for backend internal use only. No frontend
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| H A D | IntrinsicsARM.td | 841 // v8.6-A Matrix Multiply Intrinsics 852 // v8.6-A Bfloat Intrinsics
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| H A D | VPIntrinsics.def | 1 //===-- IR/VPIntrinsics.def - Describes llvm.vp.* Intrinsics -*- C++ -*-===//
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | InstCombineTables.td | 2 include "llvm/IR/Intrinsics.td"
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| H A D | AMDGPUGISel.td | 370 // FIXME: Intrinsics aren't marked as commutable, so we need to add an explicit
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| /freebsd-14.2/contrib/llvm-project/clang/lib/Sema/ |
| H A D | SemaRISCVVectorLookup.cpp | 165 StringMap<uint32_t> Intrinsics; member in __anon4488c39f0211::RISCVIntrinsicManagerImpl 393 Intrinsics.insert({Name, Index}); in InitRVVIntrinsic() 481 auto Itr = Intrinsics.find(Name); in CreateIntrinsicIfFound() 482 if (Itr != Intrinsics.end()) { in CreateIntrinsicIfFound()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | RewriteStatepointsForGC.cpp | 2598 SmallVectorImpl<CallInst *> &Intrinsics, in inlineGetBaseAndOffset() argument 2605 for (auto *Callsite : Intrinsics) in inlineGetBaseAndOffset() 3070 SmallVector<CallInst *, 64> Intrinsics; in runOnFunction() local 3085 Intrinsics.emplace_back(CI); in runOnFunction() 3089 if (ParsePointNeeded.empty() && Intrinsics.empty()) in runOnFunction() 3168 if (!Intrinsics.empty()) in runOnFunction() 3171 MadeChange |= inlineGetBaseAndOffset(F, Intrinsics, DVCache, KnownBases); in runOnFunction()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MSA.txt | 4 Intrinsics are lowered to SelectionDAG nodes where possible in order to enable
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/DirectX/ |
| H A D | DXIL.td | 14 include "llvm/IR/Intrinsics.td"
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| /freebsd-14.2/lib/clang/libllvm/ |
| H A D | Makefile | 2058 llvm/IR/IntrinsicEnums.inc: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 2061 ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 2064 llvm/IR/IntrinsicImpl.inc: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 2067 ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 2075 llvm/IR/Intrinsics${arch:H}.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 2078 ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 2079 TGHDRS+= llvm/IR/Intrinsics${arch:H}.h
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Coroutines/ |
| H A D | CoroSplit.cpp | 730 SmallVector<DbgVariableIntrinsic *, 8> Intrinsics; in collectDbgVariableIntrinsics() local 736 Intrinsics.push_back(DVI); in collectDbgVariableIntrinsics() 738 return {Intrinsics, DPValues}; in collectDbgVariableIntrinsics()
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| /freebsd-14.2/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | arm_mve.td | 826 // Intrinsics named with explicit memory and element sizes that match: 855 // Intrinsics with the memory size narrower than the vector element, so that 883 // Intrinsics named with explicit memory and element sizes that match: 916 // Intrinsics with the memory size narrower than the vector element, so that
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| H A D | arm_neon.td | 300 // Intrinsics 715 // AArch64 Intrinsics 1297 // Scalar Intrinsics
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonIntrinsicsV60.td | 9 // This file describes the Hexagon V60 Compiler Intrinsics in TableGen format.
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrMMA.td | 643 // MMA Intrinsics 783 // MMA Intrinsics
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