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Searched refs:Instrs (Results 1 – 25 of 38) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DExecutionDomainFix.h66 SmallVector<MachineInstr *, 8> Instrs; member
72 bool isCollapsed() const { return Instrs.empty(); } in isCollapsed()
112 Instrs.clear(); in clear()
H A DMachinePipeliner.h272 void fixupRegisterOverlaps(std::deque<SUnit *> &Instrs);
644 const std::deque<SUnit *> &Instrs) const;
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DExecutionDomainFix.cpp116 while (!dv->Instrs.empty()) in collapse()
117 TII->setExecutionDomain(*dv->Instrs.pop_back_val(), domain); in collapse()
137 A->Instrs.append(B->Instrs.begin(), B->Instrs.end()); in merge()
379 dv->Instrs.push_back(mi); in visitSoftInstr()
H A DMachineTraceMetrics.cpp1218 unsigned Instrs = TBI.InstrDepth; in getResourceDepth() local
1221 Instrs += TE.MTM.BlockInfo[getBlockNum()].InstrCount; in getResourceDepth()
1223 Instrs /= IW; in getResourceDepth()
1225 return std::max(Instrs, PRMax); in getResourceDepth()
1242 for (const MCSchedClassDesc *SC : Instrs) { in getResourceLength()
1270 unsigned Instrs = TBI.InstrDepth + TBI.InstrHeight; in getResourceLength() local
1273 Instrs += TE.MTM.getResources(MBB)->InstrCount; in getResourceLength()
1274 Instrs += ExtraInstrs.size(); in getResourceLength()
1275 Instrs -= RemoveInstrs.size(); in getResourceLength()
1277 Instrs /= IW; in getResourceLength()
[all …]
H A DMachineCombiner.cpp117 void instr2instrSC(SmallVectorImpl<MachineInstr *> &Instrs,
433 SmallVectorImpl<MachineInstr *> &Instrs, in instr2instrSC() argument
435 for (auto *InstrPtr : Instrs) { in instr2instrSC()
H A DCFIInstrInserter.cpp182 const std::vector<MCCFIInstruction> &Instrs = MF->getFrameInstructions(); in calculateOutgoingCFAInfo() local
193 const MCCFIInstruction &CFI = Instrs[CFIIndex]; in calculateOutgoingCFAInfo()
H A DMachineOutliner.cpp736 const std::vector<MCCFIInstruction> &Instrs = in createOutlinedFunction() local
746 MCCFIInstruction CFI = Instrs[CFIIndex]; in createOutlinedFunction()
H A DMachinePipeliner.cpp1027 DenseMap<int, std::deque<SUnit *>> Instrs; in computeScheduledInsts() local
1036 Instrs[Cycle].push_front(SU); in computeScheduledInsts()
1043 std::deque<SUnit *> &CycleInstrs = Instrs[Cycle]; in computeScheduledInsts()
3289 void SwingSchedulerDAG::fixupRegisterOverlaps(std::deque<SUnit *> &Instrs) { in fixupRegisterOverlaps() argument
3292 for (SUnit *SU : Instrs) { in fixupRegisterOverlaps()
3337 const std::deque<SUnit *> &Instrs) const { in reorderInstructions()
3339 for (SUnit *SU : Instrs) { in reorderInstructions()
3344 for (SUnit *SU : Instrs) { in reorderInstructions()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64AsmBackend.cpp607 ArrayRef<MCCFIInstruction> Instrs = FI->Instructions; in generateCompactUnwindEncoding() local
608 if (Instrs.empty()) in generateCompactUnwindEncoding()
619 for (size_t i = 0, e = Instrs.size(); i != e; ++i) { in generateCompactUnwindEncoding()
620 const MCCFIInstruction &Inst = Instrs[i]; in generateCompactUnwindEncoding()
641 const MCCFIInstruction &LRPush = Instrs[++i]; in generateCompactUnwindEncoding()
644 const MCCFIInstruction &FPPush = Instrs[++i]; in generateCompactUnwindEncoding()
683 const MCCFIInstruction &Inst2 = Instrs[++i]; in generateCompactUnwindEncoding()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DLoadStoreVectorizer.cpp336 std::vector<Chain> gatherChains(ArrayRef<Instruction *> Instrs);
1380 std::vector<Chain> Vectorizer::gatherChains(ArrayRef<Instruction *> Instrs) { in gatherChains() argument
1381 if (Instrs.empty()) in gatherChains()
1384 unsigned AS = getLoadStoreAddressSpace(Instrs[0]); in gatherChains()
1389 for (size_t I = 1; I < Instrs.size(); ++I) { in gatherChains()
1390 assert(Instrs[I - 1]->comesBefore(Instrs[I])); in gatherChains()
1391 assert(getLoadStoreAddressSpace(Instrs[I]) == AS); in gatherChains()
1429 for (Instruction *I : Instrs) { in gatherChains()
/freebsd-14.2/contrib/llvm-project/llvm/utils/TableGen/
H A DAsmWriterEmitter.cpp240 std::string Instrs = InstrsForCase[i]; in FindUniqueOperandCommands() local
241 if (Instrs.size() > 70) { in FindUniqueOperandCommands()
242 Instrs.erase(Instrs.begin()+70, Instrs.end()); in FindUniqueOperandCommands()
243 Instrs += "..."; in FindUniqueOperandCommands()
246 if (!Instrs.empty()) in FindUniqueOperandCommands()
247 UniqueOperandCommands[i] = " // " + Instrs + "\n" + in FindUniqueOperandCommands()
H A DCodeGenDAGPatterns.cpp3747 getInstructionsInTree(TreePatternNode *Tree, SmallVectorImpl<Record*> &Instrs) { in getInstructionsInTree() argument
3751 Instrs.push_back(Tree->getOperator()); in getInstructionsInTree()
3753 getInstructionsInTree(Tree->getChild(i), Instrs); in getInstructionsInTree()
3957 std::vector<Record*> Instrs = Records.getAllDerivedDefinitions("Instruction"); in ParseInstructions() local
3959 for (Record *Instr : Instrs) { in ParseInstructions()
4146 SmallVector<Record*, 8> Instrs; in VerifyInstructionFlags() local
4147 getInstructionsInTree(PTM.getDstPattern(), Instrs); in VerifyInstructionFlags()
4148 if (Instrs.empty()) in VerifyInstructionFlags()
4155 for (const Record *Instr : Instrs) { in VerifyInstructionFlags()
4190 (Instrs.size() == 1 ? in VerifyInstructionFlags()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLoadStoreOptimizer.cpp147 SmallVector<MachineInstr*, 4> Instrs; member
181 ArrayRef<MachineInstr*> Instrs);
187 ArrayRef<MachineInstr*> Instrs) const;
632 ArrayRef<MachineInstr*> Instrs) { in CreateLoadStoreMulti() argument
829 MIB.cloneMergedMemRefs(Instrs); in CreateLoadStoreMulti()
839 ArrayRef<MachineInstr*> Instrs) const { in CreateLoadStoreDouble()
855 MIB.cloneMergedMemRefs(Instrs); in CreateLoadStoreDouble()
869 for (const MachineInstr *MI : Cand.Instrs) { in MergeOpsUpdate()
914 Cand.Instrs); in MergeOpsUpdate()
932 for (MachineInstr *MI : Cand.Instrs) in MergeOpsUpdate()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCCodeEmitter.cpp469 auto Instrs = HexagonMCInstrInfo::bundleInstructions(*State.Bundle); in getFixupNoBits() local
470 for (auto I = Instrs.begin(), N = Instrs.end(); I != N; ++I) { in getFixupNoBits()
728 auto Instrs = HexagonMCInstrInfo::bundleInstructions(*State.Bundle); in getMachineOpValue() local
729 const MCOperand *I = Instrs.begin() + State.Index - 1; in getMachineOpValue()
732 assert(I != Instrs.begin() - 1 && "Couldn't find producer"); in getMachineOpValue()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86DomainReassignment.cpp304 SmallVector<MachineInstr *, 8> Instrs; member in __anon72b853df0111::Closure
341 Instrs.push_back(I); in addInstruction()
345 return Instrs; in instructions()
358 for (MachineInstr *MI : Instrs) { in dump()
/freebsd-14.2/contrib/llvm-project/clang/include/clang/Analysis/Analyses/
H A DThreadSafetyTIL.h1544 Args(std::move(As)), Instrs(std::move(Is)), TermInstr(T) {} in BasicBlock()
1564 InstrArray &instructions() { return Instrs; } in instructions()
1565 const InstrArray &instructions() const { return Instrs; } in instructions()
1597 Instrs.reserveCheck(1, Arena); in addInstruction()
1598 Instrs.push_back(V); in addInstruction()
1609 void reserveInstructions(unsigned Nins) { Instrs.reserve(Nins, Arena); } in reserveInstructions()
1623 typename V::template Container<SExpr*> Nis(Vs, Instrs.size()); in traverse()
1632 for (const auto *E : Instrs) { in traverse()
1680 InstrArray Instrs; variable
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrShiftRotate.td1 //===-- M68kInstrShiftRotate.td - Logical Instrs -----------*- tablegen -*-===//
H A DM68kInstrBits.td1 //===-- M68kInstrBits.td - Bit Manipulation Instrs ---------*- tablegen -*-===//
/freebsd-14.2/contrib/llvm-project/llvm/lib/MC/
H A DMCWin64EH.cpp658 const auto &Instrs = InstrsIter->second.Instructions; in FindMatchingEpilog() local
660 if (Instrs.size() != EpilogInstrs.size()) in FindMatchingEpilog()
664 for (unsigned i = 0; i < Instrs.size(); ++i) in FindMatchingEpilog()
665 if (Instrs[i] != EpilogInstrs[i]) { in FindMatchingEpilog()
1141 auto &Instrs = I.second.Instructions; in ARM64FindSegmentsInFunction() local
1143 checkARM64Instructions(streamer, Instrs, Start, I.second.End, in ARM64FindSegmentsInFunction()
1149 Epilogs.push_back({Start, Offset, Offset + (int64_t)(Instrs.size() - 1) * 4}); in ARM64FindSegmentsInFunction()
/freebsd-14.2/contrib/llvm-project/clang/lib/Analysis/
H A DThreadSafetyTIL.cpp155 for (auto *Instr : Instrs) in renumberInstrs()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMAsmBackend.cpp1157 ArrayRef<MCCFIInstruction> Instrs = FI->Instructions; in generateCompactUnwindEncoding() local
1158 if (Instrs.empty()) in generateCompactUnwindEncoding()
1171 for (const MCCFIInstruction &Inst : Instrs) { in generateCompactUnwindEncoding()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86AsmBackend.cpp1333 ArrayRef<MCCFIInstruction> Instrs = FI->Instructions; in generateCompactUnwindEncoding() local
1334 if (Instrs.empty()) return 0; in generateCompactUnwindEncoding()
1354 for (const MCCFIInstruction &Inst : Instrs) { in generateCompactUnwindEncoding()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DLoopAccessAnalysis.h181 const SmallVectorImpl<Instruction *> &Instrs) const;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonGenInsert.cpp1442 std::vector<MachineInstr*> Instrs; in removeDeadCode() local
1444 Instrs.push_back(&MI); in removeDeadCode()
1446 for (MachineInstr *MI : Instrs) { in removeDeadCode()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FrameLowering.cpp3983 SmallVector<TagStoreInstr, 4> Instrs; in tryMergeAdjacentSTG() local
3984 Instrs.emplace_back(&MI, Offset, Size); in tryMergeAdjacentSTG()
4001 Instrs.emplace_back(&MI, Offset, Size); in tryMergeAdjacentSTG()
4021 MachineBasicBlock::iterator InsertI = Instrs.back().MI; in tryMergeAdjacentSTG()
4043 llvm::stable_sort(Instrs, in tryMergeAdjacentSTG()
4049 int64_t CurOffset = Instrs[0].Offset; in tryMergeAdjacentSTG()
4050 for (auto &Instr : Instrs) { in tryMergeAdjacentSTG()
4060 for (auto &Instr : Instrs) { in tryMergeAdjacentSTG()

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