| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | DFAPacketizer.h | 41 class InstrItineraryData; variable 75 const InstrItineraryData *InstrItins; 82 DFAPacketizer(const InstrItineraryData *InstrItins, Automaton<uint64_t> a, in DFAPacketizer() 126 const InstrItineraryData *getInstrItins() const { return InstrItins; } in getInstrItins()
|
| H A D | ScoreboardHazardRecognizer.h | 95 const InstrItineraryData *ItinData; 109 ScoreboardHazardRecognizer(const InstrItineraryData *II,
|
| H A D | TargetSchedule.h | 34 InstrItineraryData InstrItins; 82 const InstrItineraryData *getInstrItineraries() const { in getInstrItineraries()
|
| H A D | ResourcePriorityQueue.h | 23 class InstrItineraryData; variable 62 const InstrItineraryData* InstrItins;
|
| H A D | TargetSubtargetInfo.h | 36 class InstrItineraryData; variable 136 virtual const InstrItineraryData *getInstrItineraryData() const { in getInstrItineraryData()
|
| H A D | TargetInstrInfo.h | 42 class InstrItineraryData; variable 1652 CreateTargetMIHazardRecognizer(const InstrItineraryData *, 1658 CreateTargetPostRAHazardRecognizer(const InstrItineraryData *, 1722 virtual unsigned getNumMicroOps(const InstrItineraryData *ItinData, 1734 getOperandLatency(const InstrItineraryData *ItinData, SDNode *DefNode, 1746 getOperandLatency(const InstrItineraryData *ItinData, 1753 virtual unsigned getInstrLatency(const InstrItineraryData *ItinData, 1759 virtual unsigned getInstrLatency(const InstrItineraryData *ItinData,
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 134 CreateTargetMIHazardRecognizer(const InstrItineraryData *II, 138 CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II, 316 unsigned getNumMicroOps(const InstrItineraryData *ItinData, 319 std::optional<unsigned> getOperandLatency(const InstrItineraryData *ItinData, 426 std::optional<unsigned> getVLDMDefCycle(const InstrItineraryData *ItinData, 430 std::optional<unsigned> getLDMDefCycle(const InstrItineraryData *ItinData, 434 std::optional<unsigned> getVSTMUseCycle(const InstrItineraryData *ItinData, 438 std::optional<unsigned> getSTMUseCycle(const InstrItineraryData *ItinData, 450 const InstrItineraryData *ItinData, const MachineInstr &DefMI, 457 unsigned getInstrLatency(const InstrItineraryData *ItinData, [all …]
|
| H A D | ARMSubtarget.h | 226 InstrItineraryData InstrItins; 495 const InstrItineraryData *getInstrItineraryData() const override { in getInstrItineraryData()
|
| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCInstrItineraries.h | 110 class InstrItineraryData { 120 InstrItineraryData() = default; 121 InstrItineraryData(const MCSchedModel &SM, const InstrStage *S, in InstrItineraryData() function
|
| H A D | MCSchedule.h | 28 class InstrItineraryData; variable 324 friend class InstrItineraryData; member 381 getReciprocalThroughput(unsigned SchedClass, const InstrItineraryData &IID);
|
| H A D | MCSubtargetInfo.h | 214 InstrItineraryData getInstrItineraryForCPU(StringRef CPU) const; 217 void initInstrItins(InstrItineraryData &InstrItins) const;
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/MC/ |
| H A D | MCSubtargetInfo.cpp | 328 InstrItineraryData 331 return InstrItineraryData(SchedModel, Stages, OperandCycles, ForwardingPaths); in getInstrItineraryForCPU() 334 void MCSubtargetInfo::initInstrItins(InstrItineraryData &InstrItins) const { in initInstrItins() 335 InstrItins = InstrItineraryData(getSchedModel(), Stages, OperandCycles, in initInstrItins()
|
| H A D | MCSchedule.cpp | 137 const InstrItineraryData &IID) { in getReciprocalThroughput()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600Subtarget.h | 43 InstrItineraryData InstrItins; 64 const InstrItineraryData *getInstrItineraryData() const override { in getInstrItineraryData()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGSDNodes.h | 30 class InstrItineraryData; variable 50 const InstrItineraryData *InstrItins;
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kSubtarget.h | 59 InstrItineraryData InstrItins; 169 const InstrItineraryData *getInstrItineraryData() const override { in getInstrItineraryData()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.h | 266 CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II, 280 unsigned getInstrLatency(const InstrItineraryData *ItinData, 312 std::optional<unsigned> getOperandLatency(const InstrItineraryData *ItinData, 460 unsigned getInstrTimingClassLatency(const InstrItineraryData *ItinData,
|
| H A D | HexagonHazardRecognizer.h | 48 HexagonHazardRecognizer(const InstrItineraryData *II, in HexagonHazardRecognizer()
|
| H A D | HexagonSubtarget.h | 108 InstrItineraryData InstrItins; 121 const InstrItineraryData *getInstrItineraryData() const override { in getInstrItineraryData()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCSubtarget.h | 88 InstrItineraryData InstrItins; 138 const InstrItineraryData *getInstrItineraryData() const override { in getInstrItineraryData()
|
| H A D | PPCHazardRecognizers.h | 34 PPCDispatchGroupSBHazardRecognizer(const InstrItineraryData *ItinData, in PPCDispatchGroupSBHazardRecognizer()
|
| H A D | PPCInstrInfo.h | 317 CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II, 320 unsigned getInstrLatency(const InstrItineraryData *ItinData, 324 std::optional<unsigned> getOperandLatency(const InstrItineraryData *ItinData, 329 std::optional<unsigned> getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSubtarget.h | 210 InstrItineraryData InstrItins; 394 const InstrItineraryData *getInstrItineraryData() const override { in getInstrItineraryData()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetInstrInfo.cpp | 1352 const InstrItineraryData *II, const ScheduleDAGMI *DAG) const { in CreateTargetMIHazardRecognizer() 1358 CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II, in CreateTargetPostRAHazardRecognizer() 1382 TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency() 1398 unsigned TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() 1413 unsigned TargetInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData, in getNumMicroOps() 1444 unsigned TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() 1458 const InstrItineraryData *ItinData = SchedModel.getInstrItineraries(); in hasLowDefLatency() 1584 const InstrItineraryData *ItinData, const MachineInstr &DefMI, in getOperandLatency()
|
| H A D | ScoreboardHazardRecognizer.cpp | 31 const InstrItineraryData *II, const ScheduleDAG *SchedDAG, in ScoreboardHazardRecognizer()
|