Searched refs:InsertReg (Results 1 – 4 of 4) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86InstructionSelector.cpp | 1329 const Register InsertReg = I.getOperand(2).getReg(); in selectInsert() local
1333 const LLT InsertRegTy = MRI.getType(InsertReg); in selectInsert()
1344 if (!emitInsertSubreg(DstReg, InsertReg, I, MRI, MF)) in selectInsert()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 4064 Register InsertReg = VecReg; in emitExtractVectorElt() local
4083 InsertReg = ScalarToVector->getOperand(0).getReg(); in emitExtractVectorElt()
4087 MIRBuilder.buildInstr(CopyOpc, {*DstReg}, {InsertReg}).addImm(LaneIdx); in emitExtractVectorElt()
4230 Register InsertReg = MRI.createVirtualRegister(&AArch64::FPR128RegClass); in selectUnmergeValues() local
4233 TII.get(TargetOpcode::INSERT_SUBREG), InsertReg) in selectUnmergeValues()
4242 InsertRegs.push_back(InsertReg); in selectUnmergeValues()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachinePipeliner.cpp | 1405 const auto InsertReg = [this, &CurSetPressure](RegSetTy &RegSet, in computeMaxSetPressure() local
1443 InsertReg(LiveRegSets[Iter], Def.RegUnit); in computeMaxSetPressure()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 3209 Register TargetReg, Register InsertReg, in buildBitFieldInsert() argument
3212 LLT InsertTy = B.getMRI()->getType(InsertReg); in buildBitFieldInsert()
3213 auto ZextVal = B.buildZExt(TargetTy, InsertReg); in buildBitFieldInsert()
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