Searched refs:InputReg (Results 1 – 10 of 10) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | UnreachableBlockElim.cpp | 165 Register InputReg = Input.getReg(); in runOnMachineFunction() local 170 if (InputReg != OutputReg) { in runOnMachineFunction() 174 MRI.constrainRegClass(InputReg, MRI.getRegClass(OutputReg)) && in runOnMachineFunction() 176 MRI.replaceRegWith(OutputReg, InputReg); in runOnMachineFunction() 185 .addReg(InputReg, getRegState(Input), InputSub); in runOnMachineFunction()
|
| H A D | TargetInstrInfo.cpp | 1620 RegSubRegPairAndIdx &InputReg) const { in getExtractSubregInputs() 1625 return getExtractSubregLikeInputs(MI, DefIdx, InputReg); in getExtractSubregInputs() 1637 InputReg.Reg = MOReg.getReg(); in getExtractSubregInputs() 1638 InputReg.SubReg = MOReg.getSubReg(); in getExtractSubregInputs() 1639 InputReg.SubIdx = (unsigned)MOSubIdx.getImm(); in getExtractSubregInputs()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 825 LI->getImplicitArgPtr(InputReg, MRI, MIRBuilder); in passSpecialInputs() 830 MIRBuilder.buildConstant(InputReg, *Id); in passSpecialInputs() 832 MIRBuilder.buildUndef(InputReg); in passSpecialInputs() 837 MIRBuilder.buildUndef(InputReg); in passSpecialInputs() 885 Register InputReg; in passSpecialInputs() local 904 InputReg = InputReg ? MIRBuilder.buildOr(S32, InputReg, Y).getReg(0) : Y; in passSpecialInputs() 914 InputReg = InputReg ? MIRBuilder.buildOr(S32, InputReg, Z).getReg(0) : Z; in passSpecialInputs() 917 if (!InputReg && in passSpecialInputs() 919 InputReg = MRI.createGenericVirtualRegister(S32); in passSpecialInputs() 925 MIRBuilder.buildUndef(InputReg); in passSpecialInputs() [all …]
|
| H A D | SILowerControlFlow.cpp | 738 Register InputReg = MI.getOperand(0).getReg(); in lowerInitExec() local 740 if (InputReg.isVirtual()) { in lowerInitExec() 741 MachineInstr *DefInstr = MRI->getVRegDef(InputReg); in lowerInitExec() 764 .addReg(InputReg) in lowerInitExec() 767 LV->recomputeForSingleDefVirtReg(InputReg); in lowerInitExec() 797 RecomputeRegs.insert(InputReg); in lowerInitExec()
|
| H A D | SIISelLowering.cpp | 3297 SDValue InputReg; in passSpecialInputs() local 3304 InputReg = getImplicitArgPtr(DAG, DL); in passSpecialInputs() 3311 InputReg = DAG.getUNDEF(ArgVT); in passSpecialInputs() 3316 InputReg = DAG.getUNDEF(ArgVT); in passSpecialInputs() 3356 SDValue InputReg; in passSpecialInputs() local 3369 InputReg = DAG.getConstant(0, DL, MVT::i32); in passSpecialInputs() 3378 InputReg = InputReg.getNode() ? in passSpecialInputs() 3387 InputReg = InputReg.getNode() ? in passSpecialInputs() 3397 InputReg = DAG.getUNDEF(MVT::i32); in passSpecialInputs() 3410 if (InputReg) in passSpecialInputs() [all …]
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 2522 Register InputReg = getRegForValue(I->getOperand(0)); in X86SelectTrunc() local 2523 if (!InputReg) in X86SelectTrunc() 2529 updateValueMap(I, InputReg); in X86SelectTrunc() 2593 Register InputReg = getRegForValue(Op); in fastLowerIntrinsicCall() local 2594 if (InputReg == 0) in fastLowerIntrinsicCall() 2619 InputReg = fastEmitInst_ri(Opc, RC, InputReg, 4); in fastLowerIntrinsicCall() 2626 .addReg(InputReg, RegState::Kill); in fastLowerIntrinsicCall() 2634 InputReg = fastEmit_r(MVT::i16, MVT::i32, ISD::ZERO_EXTEND, InputReg); in fastLowerIntrinsicCall() 2638 InputReg); in fastLowerIntrinsicCall() 2642 InputReg = fastEmitInst_r(Opc, RC, InputReg); in fastLowerIntrinsicCall() [all …]
|
| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 565 RegSubRegPairAndIdx &InputReg) const; 1357 RegSubRegPairAndIdx &InputReg) const { in getExtractSubregLikeInputs() argument
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 1473 Register InputReg = getRegForValue(I->getOperand(0)); in selectCast() local 1474 if (!InputReg) in selectCast() 1479 Opcode, InputReg); in selectCast()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 75 RegSubRegPairAndIdx &InputReg) const override;
|
| H A D | ARMBaseInstrInfo.cpp | 5480 RegSubRegPairAndIdx &InputReg) const { in getExtractSubregLikeInputs() 5493 InputReg.Reg = MOReg.getReg(); in getExtractSubregLikeInputs() 5494 InputReg.SubReg = MOReg.getSubReg(); in getExtractSubregLikeInputs() 5495 InputReg.SubIdx = DefIdx == 0 ? ARM::ssub_0 : ARM::ssub_1; in getExtractSubregLikeInputs()
|