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Searched refs:InVec1 (Results 1 – 2 of 2) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp7782 SDValue InVec1 = DAG.getUNDEF(VT); in isAddSubOrSubAdd() local
7831 if (InVec1.isUndef()) { in isAddSubOrSubAdd()
7832 InVec1 = Op1.getOperand(0); in isAddSubOrSubAdd()
7850 if (InVec1 != Op1.getOperand(0)) in isAddSubOrSubAdd()
7861 InVec0.isUndef() || InVec1.isUndef()) in isAddSubOrSubAdd()
7867 Opnd1 = InVec1; in isAddSubOrSubAdd()
8131 SDValue InVec0, InVec1; in LowerToHorizontalOp() local
8141 ((InVec1.isUndef() || InVec3.isUndef()) || InVec1 == InVec3)) in LowerToHorizontalOp()
8148 ((InVec1.isUndef() || InVec3.isUndef()) || InVec1 == InVec3)) in LowerToHorizontalOp()
8163 SDValue V1 = InVec1.isUndef() ? InVec3 : InVec1; in LowerToHorizontalOp()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGBuilder.cpp11950 SDValue InVec1 = getValue(I.getOperand(1)); in visitVectorInterleave() local
11958 SDValue V = DAG.getNode(ISD::CONCAT_VECTORS, DL, OutVT, InVec0, InVec1); in visitVectorInterleave()
11965 DAG.getVTList(InVT, InVT), InVec0, InVec1); in visitVectorInterleave()