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Searched refs:ImmValue (Results 1 – 17 of 17) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelDAGToDAG.cpp349 APInt ImmValue; in selectVSplatImm() local
355 if (selectVSplat(N.getNode(), ImmValue, EltTy.getSizeInBits()) && in selectVSplatImm()
356 ImmValue.getBitWidth() == EltTy.getSizeInBits()) { in selectVSplatImm()
357 if (IsSigned && ImmValue.isSignedIntN(ImmBitSize)) { in selectVSplatImm()
362 if (!IsSigned && ImmValue.isIntN(ImmBitSize)) { in selectVSplatImm()
374 APInt ImmValue; in selectVSplatUimmInvPow2() local
381 ImmValue.getBitWidth() == EltTy.getSizeInBits()) { in selectVSplatUimmInvPow2()
382 int32_t Log2 = (~ImmValue).exactLogBase2(); in selectVSplatUimmInvPow2()
395 APInt ImmValue; in selectVSplatUimmPow2() local
402 ImmValue.getBitWidth() == EltTy.getSizeInBits()) { in selectVSplatUimmPow2()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonSplitConst32AndConst64.cpp78 uint64_t ImmValue = MI.getOperand(1).getImm(); in runOnMachineFunction() local
81 .addImm(ImmValue); in runOnMachineFunction()
85 int64_t ImmValue = MI.getOperand(1).getImm(); in runOnMachineFunction() local
90 int32_t LowWord = (ImmValue & 0xFFFFFFFF); in runOnMachineFunction()
91 int32_t HighWord = (ImmValue >> 32) & 0xFFFFFFFF; in runOnMachineFunction()
H A DHexagonHardwareLoops.cpp659 int64_t Mask = 0, ImmValue = 0; in getLoopTripCount() local
661 TII->analyzeCompare(*CondI, CmpReg1, CmpReg2, Mask, ImmValue); in getLoopTripCount()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelDAGToDAG.cpp553 APInt ImmValue; in selectVSplatCommon() local
560 ImmValue.getBitWidth() == EltTy.getSizeInBits()) { in selectVSplatCommon()
563 (!Signed && ImmValue.isIntN(ImmBitSize))) { in selectVSplatCommon()
629 APInt ImmValue; in selectVSplatUimmPow2() local
637 int32_t Log2 = ImmValue.exactLogBase2(); in selectVSplatUimmPow2()
660 APInt ImmValue; in selectVSplatMaskL() local
671 if (ImmValue == ~(~ImmValue & ~(~ImmValue + 1))) { in selectVSplatMaskL()
693 APInt ImmValue; in selectVSplatMaskR() local
703 if (ImmValue == (ImmValue & ~(ImmValue + 1))) { in selectVSplatMaskR()
714 APInt ImmValue; in selectVSplatUimmInvPow2() local
[all …]
H A DMicroMipsSizeReduction.cpp528 int64_t ImmValue; in ReduceADDIUToADDIUSP() local
529 if (!GetImm(MI, Entry.ImmField(), ImmValue)) in ReduceADDIUToADDIUSP()
532 if (!AddiuspImmValue(ImmValue)) in ReduceADDIUToADDIUSP()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp2771 if (isInt<32>(ImmValue) || isUInt<32>(ImmValue)) { in loadImmediate()
2775 ImmValue = SignExtend64<32>(ImmValue); in loadImmediate()
2830 if (isInt<32>(ImmValue) || isUInt<32>(ImmValue)) { in loadImmediate()
4298 if (isRem && (ImmValue == 1 || (Signed && (ImmValue == -1)))) { in expandDivRem()
5133 else if ((ImmValue >= 1) && (ImmValue <= 32)) { in expandDRotationImm()
5164 if ((ImmValue >= 1) && (ImmValue <= 31)) { in expandDRotationImm()
5172 if ((ImmValue >= 33) && (ImmValue <= 63)) { in expandDRotationImm()
5178 if ((ImmValue >= 1) && (ImmValue <= 31)) { in expandDRotationImm()
5186 if ((ImmValue >= 33) && (ImmValue <= 63)) { in expandDRotationImm()
5564 if (ImmValue > -0x8000 && ImmValue < 0) { in expandSneI()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/
H A DSparcAsmParser.cpp621 int32_t ImmValue = RawImmValue; in expandSET() local
626 IsImm && ((is64Bit() ? 0 : -4096) <= ImmValue && ImmValue < 4096); in expandSET()
629 ValExpr = MCConstantExpr::create(ImmValue, getContext()); in expandSET()
659 if (!IsImm || IsEffectivelyImm13 || (ImmValue & 0x3ff)) { in expandSET()
686 int64_t ImmValue = IsImm ? MCValOp.getImm() : 0; in expandSETX() local
688 const MCExpr *ValExpr = IsImm ? MCConstantExpr::create(ImmValue, getContext()) in expandSETX()
692 if (IsImm && isInt<13>(ImmValue)) { in expandSETX()
717 if (IsImm && isUInt<32>(ImmValue)) in expandSETX()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.h364 uint16_t ImmValue; member
366 : SysAlias(N, E), ImmValue(I) {} in SysAliasImm()
368 : SysAlias(N, E, F), ImmValue(I) {} in SysAliasImm()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Object/
H A DMachOObjectFile.cpp3528 RebaseType = ImmValue; in moveNext()
3542 SegmentIndex = ImmValue; in moveNext()
3609 Count = ImmValue; in moveNext()
3610 if (ImmValue != 0) in moveNext()
3611 RemainingLoopCount = ImmValue - 1; in moveNext()
3885 Ordinal = ImmValue; in moveNext()
3887 if (ImmValue > O->getLibraryCount()) { in moveNext()
3942 if (ImmValue) { in moveNext()
3962 Flags = ImmValue; in moveNext()
3988 BindType = ImmValue; in moveNext()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiInstrInfo.cpp206 unsigned SrcReg2, int64_t ImmValue, in isRedundantFlagInstr() argument
221 OI->getOperand(2).getImm() == ImmValue) in isRedundantFlagInstr()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrInfo.h735 Register SrcReg2, int64_t ImmMask, int64_t ImmValue,
H A DX86InstrInfo.cpp4738 int64_t ImmMask, int64_t ImmValue, in isRedundantFlagInstr() argument
4755 OIMask != ImmMask || OIValue != ImmValue) in isRedundantFlagInstr()
4786 if (OIValue == ImmValue) { in isRedundantFlagInstr()
4789 } else if (static_cast<uint64_t>(ImmValue) == in isRedundantFlagInstr()
4793 } else if (static_cast<uint64_t>(ImmValue) == in isRedundantFlagInstr()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp2028 uint64_t ImmValue = 0; in FoldOperand() local
2040 ImmValue = FPC->getValueAPF().bitcastToAPInt().getZExtValue(); in FoldOperand()
2049 ImmValue = Value; in FoldOperand()
2062 Imm = DAG.getTargetConstant(ImmValue, SDLoc(ParentNode), MVT::i32); in FoldOperand()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp2588 int32_t ImmValue = N->getConstantOperandVal(3); in SelectMVE_WB() local
2589 Ops.push_back(getI32Imm(ImmValue, Loc)); // immediate offset in SelectMVE_WB()
2623 int32_t ImmValue = N->getConstantOperandVal(3); in SelectMVE_LongShift() local
2624 Ops.push_back(getI32Imm(ImmValue, Loc)); // immediate shift count in SelectMVE_LongShift()
2686 int32_t ImmValue = N->getConstantOperandVal(3); in SelectMVE_VSHLC() local
2687 Ops.push_back(getI32Imm(ImmValue, Loc)); // immediate shift count in SelectMVE_VSHLC()
2873 int ImmValue = ImmOp->getAsZExtVal(); in SelectMVE_VxDUP() local
2874 Ops.push_back(getI32Imm(ImmValue, Loc)); in SelectMVE_VxDUP()
H A DARMBaseInstrInfo.cpp2860 int64_t ImmValue, in isRedundantFlagInstr() argument
2885 OI->getOperand(2).getImm() == ImmValue) { in isRedundantFlagInstr()
2893 OI->getOperand(3).getImm() == ImmValue) { in isRedundantFlagInstr()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SystemOperands.td107 let SearchableFields = ["Name", "Encoding", "ImmValue"];
112 bits<5> ImmValue = immValue;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp9967 int64_t ImmValue = cast<ConstantSDNode>(Op.getOperand(2))->getSExtValue(); in lowerVECTOR_SPLICE() local
9969 if (ImmValue >= 0) { in lowerVECTOR_SPLICE()
9972 DownOffset = DAG.getConstant(ImmValue, DL, XLenVT); in lowerVECTOR_SPLICE()
9977 UpOffset = DAG.getConstant(-ImmValue, DL, XLenVT); in lowerVECTOR_SPLICE()
10804 int64_t ImmValue = cast<ConstantSDNode>(Offset)->getSExtValue(); in lowerVPSpliceExperimental() local
10806 if (ImmValue >= 0) { in lowerVPSpliceExperimental()
10809 DownOffset = DAG.getConstant(ImmValue, DL, XLenVT); in lowerVPSpliceExperimental()
10814 UpOffset = DAG.getConstant(-ImmValue, DL, XLenVT); in lowerVPSpliceExperimental()