| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCCodeEmitter.cpp | 424 ImmOffset = CDisp8 - Value; in isDispOrCDisp8()
519 emitConstant(DispOp.getImm() + ImmOffset, Size, CB); in emitImmediate()
532 assert(ImmOffset == 0); in emitImmediate()
564 ImmOffset -= 4; in emitImmediate()
572 ImmOffset -= 2; in emitImmediate()
574 ImmOffset -= 1; in emitImmediate()
576 if (ImmOffset) in emitImmediate()
802 int ImmOffset = 0; in emitMemModRMByte() local
806 ImmOffset); in emitMemModRMByte()
829 int ImmOffset = 0; in emitMemModRMByte() local
[all …]
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 1507 ImmOffset = CurDAG->getTargetConstant(0, DL, MVT::i32); in SelectMUBUFScratchOffen()
1744 int64_t ImmOffset = 0; in SelectGlobalSAddr() local
1757 ImmOffset = COffsetVal; in SelectGlobalSAddr()
1898 SDValue VAddr, SDValue SAddr, uint64_t ImmOffset) const { in checkFlatScratchSVSSwizzleBug()
1908 KnownBits::makeConstant(APInt(32, ImmOffset))); in checkFlatScratchSVSSwizzleBug()
1917 int64_t ImmOffset = 0; in SelectScratchSVAddr() local
1927 ImmOffset = COffsetVal; in SelectScratchSVAddr()
1976 if (checkFlatScratchSVSSwizzleBug(VAddr, SAddr, ImmOffset)) in SelectScratchSVAddr()
2562 int ImmOffset = 0; in SelectDS_GWS() local
2578 ImmOffset = ConstOffset->getZExtValue(); in SelectDS_GWS()
[all …]
|
| H A D | AMDGPUISelDAGToDAG.h | 168 SDValue &ImmOffset) const;
189 uint64_t ImmOffset) const;
|
| H A D | AMDGPUInstructionSelector.h | 250 uint64_t ImmOffset) const;
297 Register &SOffset, int64_t &ImmOffset) const;
|
| H A D | AMDGPUInstructionSelector.cpp | 1676 unsigned ImmOffset; in selectDSGWSIntrinsic() local
1702 std::tie(BaseOffset, ImmOffset) = in selectDSGWSIntrinsic()
1742 MIB.addImm(ImmOffset) in selectDSGWSIntrinsic()
4404 int64_t ImmOffset = 0; in selectGlobalSAddr() local
4414 ImmOffset = ConstOffset; in selectGlobalSAddr()
4515 int64_t ImmOffset = 0; in selectScratchSAddr() local
4525 ImmOffset = ConstOffset; in selectScratchSAddr()
4592 int64_t ImmOffset = 0; in selectScratchSVAddr() local
4602 ImmOffset = ConstOffset; in selectScratchSVAddr()
5159 .addImm(ImmOffset); in splitIllegalMUBUFOffset()
[all …]
|
| H A D | AMDGPURegisterBankInfo.cpp | 1255 uint32_t SOffset, ImmOffset; in setBufferOffsets() local
1259 InstOffsetVal = ImmOffset; in setBufferOffsets()
1273 uint32_t SOffset, ImmOffset; in setBufferOffsets() local
1280 InstOffsetVal = ImmOffset; in setBufferOffsets()
1365 int64_t ImmOffset = 0; in applyMappingSBufferLoad() local
1801 unsigned ImmOffset; in splitBufferOffsets() local
1809 if (ImmOffset != 0) { in splitBufferOffsets()
1819 ImmOffset -= Overflow; in splitBufferOffsets()
1821 Overflow += ImmOffset; in splitBufferOffsets()
1822 ImmOffset = 0; in splitBufferOffsets()
[all …]
|
| H A D | AMDGPULegalizerInfo.cpp | 5468 unsigned ImmOffset; in splitBufferOffsets() local
5472 std::tie(BaseReg, ImmOffset) = in splitBufferOffsets()
5487 unsigned Overflow = ImmOffset & ~MaxImm; in splitBufferOffsets()
5488 ImmOffset -= Overflow; in splitBufferOffsets()
5490 Overflow += ImmOffset; in splitBufferOffsets()
5491 ImmOffset = 0; in splitBufferOffsets()
5506 return std::pair(BaseReg, ImmOffset); in splitBufferOffsets()
5618 unsigned ImmOffset; in legalizeBufferStore() local
5674 .addImm(ImmOffset); // offset(imm) in legalizeBufferStore()
5755 unsigned ImmOffset; in legalizeBufferLoad() local
[all …]
|
| H A D | SIInstrInfo.h | 1309 bool splitMUBUFOffset(uint32_t Imm, uint32_t &SOffset, uint32_t &ImmOffset,
|
| H A D | SIISelLowering.cpp | 9805 unsigned ImmOffset = C1->getZExtValue(); in splitBufferOffsets() local
9814 unsigned Overflow = ImmOffset & ~MaxImm; in splitBufferOffsets()
9815 ImmOffset -= Overflow; in splitBufferOffsets()
9817 Overflow += ImmOffset; in splitBufferOffsets()
9818 ImmOffset = 0; in splitBufferOffsets()
9848 uint32_t SOffset, ImmOffset; in setBufferOffsets() local
9849 if (TII->splitMUBUFOffset(Imm, SOffset, ImmOffset, Alignment)) { in setBufferOffsets()
9852 Offsets[2] = DAG.getTargetConstant(ImmOffset, DL, MVT::i32); in setBufferOffsets()
9859 uint32_t SOffset, ImmOffset; in setBufferOffsets() local
9862 TII->splitMUBUFOffset(Offset, SOffset, ImmOffset, Alignment)) { in setBufferOffsets()
[all …]
|
| H A D | SIInstrInfo.cpp | 8925 uint32_t &ImmOffset, Align Alignment) const { in splitMUBUFOffset() argument
8964 ImmOffset = Imm; in splitMUBUFOffset()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.cpp | 856 const int64_t ImmOffset = MFI.getObjectOffset(SaveIndex); in emitPrologue() local
857 assert((ImmOffset <= -8 && ImmOffset >= -512) && in emitPrologue()
859 assert(((ImmOffset & 0x7) == 0) && in emitPrologue()
863 .addImm(ImmOffset) in emitPrologue()
1871 const int64_t ImmOffset = MFI.getObjectOffset(SaveIndex); in emitEpilogue() local
1872 assert((ImmOffset <= -8 && ImmOffset >= -512) && in emitEpilogue()
1874 assert(((ImmOffset & 0x7) == 0) && in emitEpilogue()
1878 .addImm(ImmOffset) in emitEpilogue()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandPseudoInsts.cpp | 763 int ImmOffset = MI.getOperand(2).getImm() + Offset; in expandSVESpillFill() local
765 assert(ImmOffset >= -256 && ImmOffset < 256 && in expandSVESpillFill()
771 .addImm(ImmOffset); in expandSVESpillFill()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 4049 SDValue Base, RegOffset, ImmOffset; in Select() local
4052 SelectAddrMode3(Addr, Base, RegOffset, ImmOffset); in Select()
4061 SDValue Ops[] = {Base, RegOffset, ImmOffset, Chain}; in Select()
4078 SDValue Base, RegOffset, ImmOffset; in Select() local
4081 SelectAddrMode3(Addr, Base, RegOffset, ImmOffset); in Select()
4092 SDValue Ops[] = {SDValue(RegPair, 0), Base, RegOffset, ImmOffset, Chain}; in Select()
|