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/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/IR/
H A DIntrinsicsX86.td3634 llvm_i32_ty], [IntrNoMem, ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<5>>]>;
3744 [IntrNoMem, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<4>>]>;
3762 [IntrNoMem, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<4>>]>;
5407 [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>,
5411 [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>,
5415 [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>,
5419 [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>,
5423 [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>,
5428 [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>,
5433 [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>,
[all …]
H A DIntrinsicsLoongArch.td61 [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<2>>]>;
63 [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<2>>]>;
455 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
649 [IntrWriteMem, IntrArgMemOnly, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>]>;
652 [IntrWriteMem, IntrArgMemOnly, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>]>;
655 [IntrWriteMem, IntrArgMemOnly, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>]>;
658 [IntrWriteMem, IntrArgMemOnly, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>]>;
1175 [IntrWriteMem, IntrArgMemOnly, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>]>;
1178 [IntrWriteMem, IntrArgMemOnly, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>]>;
1181 [IntrWriteMem, IntrArgMemOnly, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>]>;
[all …]
H A DIntrinsicsBPF.td25 [IntrNoMem, ImmArg<ArgIndex<1>>]>;
53 ImmArg <ArgIndex<1>>, // volatile
54 ImmArg <ArgIndex<2>>, // atomic order
55 ImmArg <ArgIndex<3>>, // synscope id
56 ImmArg <ArgIndex<4>>, // alignment
57 ImmArg <ArgIndex<5>>, // inbounds
73 ImmArg <ArgIndex<2>>, // volatile
74 ImmArg <ArgIndex<3>>, // atomic order
75 ImmArg <ArgIndex<4>>, // syncscope id
76 ImmArg <ArgIndex<5>>, // alignment
[all …]
H A DIntrinsicsHexagonDep.td1154 Hexagon_i64_i32i32_Intrinsic<"HEXAGON_A2_combineii", [IntrNoMem, ImmArg<ArgIndex<0>>, ImmArg<ArgInd…
1757 Hexagon_i32_i32i32i32_Intrinsic<"HEXAGON_C2_muxii", [IntrNoMem, ImmArg<ArgIndex<1>>, ImmArg<ArgInde…
2843 Hexagon_i32_i32i32i32_Intrinsic<"HEXAGON_M4_mpyri_addi", [IntrNoMem, ImmArg<ArgIndex<0>>, ImmArg<Ar…
3185 Hexagon_i32_i32i32i32_Intrinsic<"HEXAGON_S2_extractu", [IntrNoMem, ImmArg<ArgIndex<1>>, ImmArg<ArgI…
3191 Hexagon_i64_i64i32i32_Intrinsic<"HEXAGON_S2_extractup", [IntrNoMem, ImmArg<ArgIndex<1>>, ImmArg<Arg…
3197 Hexagon_i32_i32i32i32i32_Intrinsic<"HEXAGON_S2_insert", [IntrNoMem, ImmArg<ArgIndex<2>>, ImmArg<Arg…
3203 Hexagon_i64_i64i64i32i32_Intrinsic<"HEXAGON_S2_insertp", [IntrNoMem, ImmArg<ArgIndex<2>>, ImmArg<Ar…
3494 Hexagon_i32_i32i32i32_Intrinsic<"HEXAGON_S4_extract", [IntrNoMem, ImmArg<ArgIndex<1>>, ImmArg<ArgIn…
3500 Hexagon_i64_i64i32i32_Intrinsic<"HEXAGON_S4_extractp", [IntrNoMem, ImmArg<ArgIndex<1>>, ImmArg<ArgI…
3524 Hexagon_i32_i32i32i32_Intrinsic<"HEXAGON_S4_ori_asl_ri", [IntrNoMem, ImmArg<ArgIndex<0>>, ImmArg<Ar…
[all …]
H A DIntrinsicsMips.td305 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
308 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
358 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
361 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
365 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
586 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
589 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
592 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
595 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
612 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
[all …]
H A DIntrinsicsRISCVXsf.td29 … !listconcat([IntrNoMem, ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>], // bit<27-26> and bit<24-20>
31 !if(ImmScalar, !if(HasDst, [ImmArg<ArgIndex<2>>],
32 … [ImmArg<ArgIndex<3>>]), []), // ScalarOperand
48 … !listconcat([IntrNoMem, ImmArg<ArgIndex<0>>], // bit<27-26>
50 !if(ImmScalar, !if(HasDst, [ImmArg<ArgIndex<2>>],
51 … [ImmArg<ArgIndex<3>>]), []), // ScalarOperand
67 … !listconcat([IntrNoMem, ImmArg<ArgIndex<0>>], // bit<27-26>
82 … !listconcat([IntrNoMem, ImmArg<ArgIndex<0>>], // bit<27-26>
135 [ImmArg<ArgIndex<4>>, IntrNoMem] >, RISCVVIntrinsic {
144 [ImmArg<ArgIndex<3>>, IntrNoMem]>, RISCVVIntrinsic {
[all …]
H A DIntrinsicsAMDGPU.td541 ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>,
1512 ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>, ImmArg<ArgIndex<6>>,
1857 [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<6>>,
1871 [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<6>>,
1883 [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<4>>,
1985 ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>]>;
2013 ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>]>;
2022 ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>]>;
2924 ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<5>>]
2978 ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<5>>]
[all …]
H A DIntrinsicsWebAssembly.td111 [Throws, IntrNoReturn, ImmArg<ArgIndex<0>>]>;
127 [IntrHasSideEffects, ImmArg<ArgIndex<0>>]>;
134 [IntrNoMem, ImmArg<ArgIndex<1>>]>;
179 ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>,
180 ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>,
181 ImmArg<ArgIndex<6>>, ImmArg<ArgIndex<7>>,
182 ImmArg<ArgIndex<8>>, ImmArg<ArgIndex<9>>,
183 ImmArg<ArgIndex<10>>, ImmArg<ArgIndex<11>>,
184 ImmArg<ArgIndex<12>>, ImmArg<ArgIndex<13>>,
185 ImmArg<ArgIndex<14>>, ImmArg<ArgIndex<15>>,
[all …]
H A DIntrinsicsARM.td347 …y, llvm_i32_ty, llvm_i32_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<3>>, ImmA…
350 …y, llvm_i32_ty, llvm_i32_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<3>>, ImmA…
356 …llvm_i32_ty, llvm_i32_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>, ImmArg<…
360 …llvm_i32_ty, llvm_i32_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>, ImmArg<…
365 …2_ty, llvm_i32_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>, ImmArg<ArgInde…
368 …2_ty, llvm_i32_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>, ImmArg<ArgInde…
372 … llvm_i32_ty, llvm_i32_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<4>>]>;
374 … llvm_i32_ty, llvm_i32_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<4>>]>;
377 … llvm_i32_ty, llvm_i32_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>]>;
379 … llvm_i32_ty, llvm_i32_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>]>;
[all …]
H A DIntrinsicsSPIRV.td15 …def int_spv_assign_ptr_type : Intrinsic<[], [llvm_any_ty, llvm_metadata_ty, llvm_i32_ty], [ImmArg<…
22 …def int_spv_gep : Intrinsic<[llvm_anyptr_ty], [llvm_i1_ty, llvm_any_ty, llvm_vararg_ty], [ImmArg<A…
23 …sic<[llvm_i32_ty], [llvm_anyptr_ty, llvm_i16_ty, llvm_i8_ty], [ImmArg<ArgIndex<1>>, ImmArg<ArgInde…
24 …c<[], [llvm_any_ty, llvm_anyptr_ty, llvm_i16_ty, llvm_i8_ty], [ImmArg<ArgIndex<2>>, ImmArg<ArgInde…
31 …st : Intrinsic<[llvm_any_ty], [llvm_any_ty, llvm_metadata_ty, llvm_i32_ty], [ImmArg<ArgIndex<2>>]>;
H A DIntrinsicsSystemZ.td38 [IntrNoMem, ImmArg<ArgIndex<1>>]>;
59 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
64 [IntrNoMem, ImmArg<ArgIndex<3>>]>;
68 [IntrNoMem, ImmArg<ArgIndex<3>>]>;
230 [IntrNoMem, ImmArg<ArgIndex<1>>]>;
243 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
366 [IntrNoMem, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>]>;
398 [IntrNoMem, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>]>;
413 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
418 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
[all …]
H A DIntrinsicsRISCV.td346 [ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<5>>, IntrNoMem]>, RISCVVIntrinsic {
477 [ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<6>>, IntrNoMem]>, RISCVVIntrinsic {
540 [ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<6>>, IntrNoMem]>, RISCVVIntrinsic {
683 [ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<6>>, IntrNoMem]>, RISCVVIntrinsic {
708 [ImmArg<ArgIndex<4>>,ImmArg<ArgIndex<6>>, IntrNoMem, IntrHasSideEffects]>,
733 [ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<6>>, IntrNoMem,
781 [ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<5>>, IntrNoMem]>,
793 [ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<6>>, IntrNoMem]>,
825 [ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<5>>, IntrNoMem] >,
837 [ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<6>>, IntrNoMem]>,
[all …]
H A DIntrinsics.td868 ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>]>;
966 ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>]>;
993 ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>]>;
1077 ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>,
1597 ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<3>>,
1605 [IntrNoMem, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>]>;
2199 ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>]>;
2303 [ImmArg<ArgIndex<2>>]>;
2401 ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>]>;
2408 NoCapture<ArgIndex<0>>, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>,
[all …]
H A DIntrinsicsAArch64.td72 ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>
1082 [IntrNoMem, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>]>;
1092 [IntrNoMem, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>]>;
1151 [IntrNoMem, ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>]>;
1369 [IntrNoMem, ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>]>;
3566 [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<2>>, IntrReadMem]>;
3569 [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<2>>, IntrReadMem]>;
3575 [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<2>>, IntrReadMem]>;
3578 [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<2>>, IntrReadMem]>;
3586 [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<2>>, IntrReadMem]>;
[all …]
H A DIntrinsicsPowerPC.td27 [IntrArgMemOnly, NoCapture<ArgIndex<0>>, ImmArg<ArgIndex<1>>]>;
618 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
622 [IntrNoMem, ImmArg<ArgIndex<0>>]>;
626 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
630 [IntrNoMem, ImmArg<ArgIndex<0>>]>;
1195 ImmArg<ArgIndex<2>>]>;
1200 ImmArg<ArgIndex<2>>]>;
1829 ImmArg<ArgIndex<0>>]>;
1834 ImmArg<ArgIndex<0>>]>;
1838 ImmArg<ArgIndex<0>>]>;
[all …]
H A DIntrinsicsRISCVXCV.td36 ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>]>;
H A DIntrinsicsHexagon.td54 [IntrArgMemOnly, ImmArg<ArgIndex<3>>]>;
60 [IntrWriteMem, ImmArg<ArgIndex<3>>]>;
66 [IntrWriteMem, ImmArg<ArgIndex<3>>]>;
268 ImmArg<ArgIndex<2>>]>;
288 ImmArg<ArgIndex<2>>],
320 ImmArg<ArgIndex<2>>]>;
344 ImmArg<ArgIndex<2>>],
H A DIntrinsicsRISCVXTHead.td20 [ImmArg<ArgIndex<5>>, IntrNoMem]>, RISCVVIntrinsic {
H A DAttributes.td231 def ImmArg : EnumAttr<"immarg", [ParamAttr]>;
/freebsd-14.2/contrib/llvm-project/llvm/utils/TableGen/
H A DCodeGenIntrinsics.cpp235 addArgAttribute(ArgNo, ImmArg); in setProperty()
260 ArgAttribute Val{ImmArg, 0}; in isParamImmArg()
H A DCodeGenIntrinsics.h118 ImmArg, enumerator
H A DIntrinsicEmitter.cpp472 case CodeGenIntrinsic::ImmArg: in EmitAttributes()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFPreserveStaticOffset.cpp238 Call->addParamAttr(I, Attribute::ImmArg); in makeGEPAndLoad()
262 Call->addParamAttr(I, Attribute::ImmArg); in makeGEPAndStore()
/freebsd-14.2/contrib/llvm-project/llvm/lib/FuzzMutate/
H A DRandomIRBuilder.cpp282 return !Callee->hasParamAttribute(OperandNo, Attribute::ImmArg); in isCompatibleReplacement()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVEmitIntrinsics.cpp597 (II->paramHasAttr(OpNo, Attribute::ImmArg)))) in processInstrAfterVisit()

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