| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeFloatTypes.cpp | 2264 IVT, Promoted); in PromoteFloatOp_BITCAST()
2358 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits()); in PromoteFloatOp_STORE() local
2362 IVT, Promoted); in PromoteFloatOp_STORE()
2481 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), in PromoteFloatRes_BITCAST() local
2483 SDValue Cast = DAG.getBitcast(IVT, N->getOperand(0)); in PromoteFloatRes_BITCAST()
2493 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits()); in PromoteFloatRes_ConstantFP() local
2495 IVT); in PromoteFloatRes_ConstantFP()
2555 EVT IVT = NewOp.getValueType().getVectorElementType(); in PromoteFloatRes_EXTRACT_VECTOR_ELT() local
2558 SDValue NewVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, IVT, in PromoteFloatRes_EXTRACT_VECTOR_ELT()
2642 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits()); in PromoteFloatRes_FP_ROUND() local
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| H A D | LegalizeDAG.cpp | 1562 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), NumBits); in getSignAsIntValue() local
1564 if (TLI.isTypeLegal(IVT)) { in getSignAsIntValue()
1565 State.IntValue = DAG.getNode(ISD::BITCAST, DL, IVT, Value); in getSignAsIntValue()
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| /freebsd-14.2/stand/i386/btx/btx/ |
| H A D | btx.S | 274 lidt ivtdesc # Set IVT
577 lidt ivtdesc # Set IVT
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 1367 MVT IVT = (MVT::SimpleValueType)IntReg; in computeRegisterProperties() local
1368 if (isTypeLegal(IVT)) { in computeRegisterProperties()
1373 ValueTypeActions.setTypeAction(IVT, TypePromoteInteger); in computeRegisterProperties()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 5565 MVT IVT = MVT::getIntegerVT(VectorBits); in PerformEXTRACTCombine() local
5573 ISD::SRA, DL, IVT, DCI.DAG.getNode(ISD::BITCAST, DL, IVT, Vector), in PerformEXTRACTCombine()
5574 DCI.DAG.getConstant(Index->getZExtValue() * EltBits, DL, IVT))); in PerformEXTRACTCombine()
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| /freebsd-14.2/contrib/llvm-project/clang/lib/Sema/ |
| H A D | SemaInit.cpp | 1868 const VectorType *IVT = IType->castAs<VectorType>(); in CheckVectorType() local
1869 unsigned numIElts = IVT->getNumElements(); in CheckVectorType()
1875 IVT->getVectorKind()); in CheckVectorType()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 7479 MVT IVT = in LowerBUILD_VECTORvXbf16() local
7485 SDValue Res = DAG.getNode(ISD::BUILD_VECTOR, SDLoc(), IVT, NewOps); in LowerBUILD_VECTORvXbf16()
18072 MVT IVT = VT.changeVectorElementTypeToInteger(); in LowerINSERT_VECTOR_ELT() local
18073 SDValue Res = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, IVT, in LowerINSERT_VECTOR_ELT()
18074 DAG.getBitcast(IVT, N0), in LowerINSERT_VECTOR_ELT()
28061 EVT IVT = VT.changeTypeToInteger(); in LowerFMINIMUM_FMAXIMUM() local
28153 SDValue XInt = DAG.getNode(ISD::BITCAST, DL, IVT, X); in LowerFMINIMUM_FMAXIMUM()
28154 SDValue ZeroCst = DAG.getConstant(0, DL, IVT); in LowerFMINIMUM_FMAXIMUM()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 8078 MVT IVT = (FVT == MVT::f32) ? MVT::i32 : MVT::i16; in LowerBUILD_VECTOR() local
8080 Ops.push_back(DAG.getNode(ISD::BITCAST, dl, IVT, in LowerBUILD_VECTOR()
8082 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), IVT, NumElts); in LowerBUILD_VECTOR()
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