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Searched refs:HiOp (Results 1 – 5 of 5) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonRDFOpt.cpp124 const MachineOperand &HiOp = MI->getOperand(1); in INITIALIZE_PASS_DEPENDENCY() local
128 DFG.makeRegRef(HiOp.getReg(), HiOp.getSubReg())); in INITIALIZE_PASS_DEPENDENCY()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp10215 unsigned HiOp = Signed ? ISD::MULHS : ISD::MULHU; in expandFixedPointMul() local
10220 } else if (isOperationLegalOrCustom(HiOp, VT)) { in expandFixedPointMul()
10222 Hi = DAG.getNode(HiOp, dl, VT, LHS, RHS); in expandFixedPointMul()
H A DDAGCombiner.cpp613 unsigned HiOp);
5314 unsigned HiOp) { in SimplifyNodeWithTwoResults() argument
5326 TLI.isOperationLegalOrCustom(HiOp, N->getValueType(1)))) { in SimplifyNodeWithTwoResults()
5327 SDValue Res = DAG.getNode(HiOp, SDLoc(N), N->getValueType(1), N->ops()); in SimplifyNodeWithTwoResults()
5347 SDValue Hi = DAG.getNode(HiOp, SDLoc(N), N->getValueType(1), N->ops()); in SimplifyNodeWithTwoResults()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp28425 SDValue HiOp = B.getOperand(i + j + 8); in LowervXi8MulWithUNPCK() local
28429 HiOp = DAG.getAnyExtOrTrunc(HiOp, dl, MVT::i16); in LowervXi8MulWithUNPCK()
28432 HiOp = DAG.getNode(ISD::SHL, dl, MVT::i16, HiOp, in LowervXi8MulWithUNPCK()
28436 HiOp = DAG.getZExtOrTrunc(HiOp, dl, MVT::i16); in LowervXi8MulWithUNPCK()
28440 HiOps.push_back(HiOp); in LowervXi8MulWithUNPCK()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp11072 SDValue HiOp = in performFCopySignCombine() local
11075 SDValue Vector = DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v2f32, MagLo, HiOp); in performFCopySignCombine()