Searched refs:FullDestReg (Results 1 – 2 of 2) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 7692 Register FullDestReg = MRI.createVirtualRegister(NewDestRC); in splitScalar64BitUnaryOp() local 7693 BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), FullDestReg) in splitScalar64BitUnaryOp() 7699 MRI.replaceRegWith(Dest.getReg(), FullDestReg); in splitScalar64BitUnaryOp() 7708 addUsersToMoveToVALUWorklist(FullDestReg, MRI, Worklist); in splitScalar64BitUnaryOp() 7805 MRI.replaceRegWith(Dest.getReg(), FullDestReg); in splitScalarSMulU64() 7817 addUsersToMoveToVALUWorklist(FullDestReg, MRI, Worklist); in splitScalarSMulU64() 7874 MRI.replaceRegWith(Dest.getReg(), FullDestReg); in splitScalarSMulPseudo() 7882 addUsersToMoveToVALUWorklist(FullDestReg, MRI, Worklist); in splitScalarSMulPseudo() 7936 Register FullDestReg = MRI.createVirtualRegister(NewDestRC); in splitScalar64BitBinaryOp() local 7943 MRI.replaceRegWith(Dest.getReg(), FullDestReg); in splitScalar64BitBinaryOp() [all …]
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| H A D | SILoadStoreOptimizer.cpp | 2006 Register FullDestReg = MRI->createVirtualRegister(TRI->getVGPR64Class()); in computeBase() local 2008 BuildMI(*MBB, MBBI, DL, TII->get(TargetOpcode::REG_SEQUENCE), FullDestReg) in computeBase() 2016 return FullDestReg; in computeBase()
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