Searched refs:Fma3 (Results 1 – 2 of 2) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 4879 auto Fma3 = B.buildFMA(S32, Fma2, Fma1, Mul, Flags); in legalizeFDIV32() local
4880 auto Fma4 = B.buildFMA(S32, NegDivScale0, Fma3, NumeratorScaled, Flags); in legalizeFDIV32()
4895 .addUse(Fma3.getReg(0)) in legalizeFDIV32()
4948 auto Fma3 = B.buildFMA(S64, Fma1, Fma2, Fma1, Flags); in legalizeFDIV64() local
4949 auto Mul = B.buildFMul(S64, DivScale1.getReg(0), Fma3, Flags); in legalizeFDIV64()
4975 .addUse(Fma3.getReg(0)) in legalizeFDIV64()
|
| H A D | SIISelLowering.cpp | 10544 SDValue Fma3 = getFPTernOp(DAG, ISD::FMA, SL, MVT::f32, in LowerFDIV32() local
10547 SDValue Fma4 = getFPTernOp(DAG, ISD::FMA, SL, MVT::f32, NegDivScale0, Fma3, in LowerFDIV32()
10548 NumeratorScaled, Fma3, Flags); in LowerFDIV32()
10578 {Fma4, Fma1, Fma3, Scale}, Flags); in LowerFDIV32()
10609 SDValue Fma3 = DAG.getNode(ISD::FMA, SL, MVT::f64, Fma1, Fma2, Fma1); in LowerFDIV64() local
10610 SDValue Mul = DAG.getNode(ISD::FMUL, SL, MVT::f64, DivScale1, Fma3); in LowerFDIV64()
10645 Fma4, Fma3, Mul, Scale); in LowerFDIV64()
|