| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 64 EVT FloatVT; member
1559 EVT FloatVT = Value.getValueType(); in getSignAsIntValue() local
1560 unsigned NumBits = FloatVT.getScalarSizeInBits(); in getSignAsIntValue()
1561 State.FloatVT = FloatVT; in getSignAsIntValue()
1617 return DAG.getLoad(State.FloatVT, DL, Chain, State.FloatPtr, in modifySignAsInt()
1636 EVT FloatVT = Mag.getValueType(); in ExpandFCOPYSIGN() local
1637 if (TLI.isOperationLegalOrCustom(ISD::FABS, FloatVT) && in ExpandFCOPYSIGN()
1638 TLI.isOperationLegalOrCustom(ISD::FNEG, FloatVT)) { in ExpandFCOPYSIGN()
1700 EVT FloatVT = Value.getValueType(); in ExpandFABS() local
1701 if (TLI.isOperationLegalOrCustom(ISD::FCOPYSIGN, FloatVT)) { in ExpandFABS()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrFormats.td | 692 class fixedpoint_i32<ValueType FloatVT>
693 : Operand<FloatVT>,
694 ComplexPattern<FloatVT, 1, "SelectCVTFixedPosOperand<32>", [fpimm, ld]> {
700 class fixedpoint_i64<ValueType FloatVT>
701 : Operand<FloatVT>,
702 ComplexPattern<FloatVT, 1, "SelectCVTFixedPosOperand<64>", [fpimm, ld]> {
716 class fixedpoint_recip_i32<ValueType FloatVT>
717 : Operand<FloatVT>,
718 ComplexPattern<FloatVT, 1, "SelectCVTFixedPosRecipOperand<32>", [fpimm, ld]> {
723 class fixedpoint_recip_i64<ValueType FloatVT>
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 889 EVT FloatVT = MVT::getVectorVT(MVT::f32, VT.getVectorElementCount()); in RISCVTargetLowering() local
890 if (isTypeLegal(FloatVT)) { in RISCVTargetLowering()
1218 EVT FloatVT = MVT::getVectorVT(MVT::f32, VT.getVectorElementCount()); in RISCVTargetLowering() local
1219 if (isTypeLegal(FloatVT)) in RISCVTargetLowering()
5139 MVT FloatVT = MVT::getVectorVT(FloatEltVT, VT.getVectorElementCount()); in lowerCTLZ_CTTZ_ZERO_UNDEF() local
5144 assert(DAG.getTargetLoweringInfo().isTypeLegal(FloatVT) && in lowerCTLZ_CTTZ_ZERO_UNDEF()
5160 if (FloatVT.bitsGT(VT)) { in lowerCTLZ_CTTZ_ZERO_UNDEF()
5162 FloatVal = DAG.getNode(ISD::VP_UINT_TO_FP, DL, FloatVT, Src, Mask, VL); in lowerCTLZ_CTTZ_ZERO_UNDEF()
5164 FloatVal = DAG.getNode(ISD::UINT_TO_FP, DL, FloatVT, Src); in lowerCTLZ_CTTZ_ZERO_UNDEF()
5180 FloatVal = convertFromScalableVector(FloatVT, FloatVal, DAG, Subtarget); in lowerCTLZ_CTTZ_ZERO_UNDEF()
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 15283 EVT FloatVT = EVT::getVectorVT(*DAG.getContext(), MVT::f64, NumElts); in PerformBUILD_VECTORCombine() local
15284 SDValue BV = DAG.getBuildVector(FloatVT, dl, Ops); in PerformBUILD_VECTORCombine()
15483 EVT FloatVT = EVT::getVectorVT(*DAG.getContext(), MVT::f64, in PerformInsertEltCombine() local
15485 SDValue Vec = DAG.getNode(ISD::BITCAST, dl, FloatVT, N->getOperand(0)); in PerformInsertEltCombine()
15490 SDValue InsElt = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, FloatVT, in PerformInsertEltCombine()
16849 EVT FloatVT = EVT::getVectorVT(*DAG.getContext(), MVT::f64, in PerformSTORECombine() local
16851 SDValue Vec = DAG.getNode(ISD::BITCAST, dl, FloatVT, IntVec); in PerformSTORECombine()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 45805 MVT FloatVT = in combinePTESTCC() local
45807 Res = DAG.getBitcast(FloatVT, Res); in combinePTESTCC()
46085 MVT FloatVT = MVT::getVectorVT(FloatSVT, NumElts); in combineSetCCMOVMSK() local
46086 MVT IntVT = FloatVT.changeVectorElementTypeToInteger(); in combineSetCCMOVMSK()
46091 DAG.getBitcast(FloatVT, LHS), in combineSetCCMOVMSK()
46092 DAG.getBitcast(FloatVT, RHS)); in combineSetCCMOVMSK()
54821 MVT FloatVT = VT.changeVectorElementType(MVT::f32); in combineConcatVectorOps() local
54822 SDValue Res = DAG.getBitcast(FloatVT, ConcatSubOperand(VT, Ops, 0)); in combineConcatVectorOps()
54824 DAG.getNode(X86ISD::VPERMILPI, DL, FloatVT, Res, Op0.getOperand(1)); in combineConcatVectorOps()
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