| /freebsd-14.2/contrib/llvm-project/llvm/lib/MC/ |
| H A D | MCSubtargetInfo.cpp | 242 FeatureBits.flip(FB); in ToggleFeature()
243 return FeatureBits; in ToggleFeature()
247 FeatureBits ^= FB; in ToggleFeature()
248 return FeatureBits; in ToggleFeature()
254 return FeatureBits; in SetFeatureBitsTransitively()
261 FeatureBits.reset(I); in ClearFeatureBitsTransitively()
265 return FeatureBits; in ClearFeatureBitsTransitively()
279 FeatureBits.set(FeatureEntry->Value); in ToggleFeature()
290 return FeatureBits; in ToggleFeature()
295 return FeatureBits; in ApplyFeatureFlag()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVBaseInfo.cpp | 39 ABI computeTargetABI(const Triple &TT, const FeatureBitset &FeatureBits, in computeTargetABI() argument
43 bool IsRVE = FeatureBits[RISCV::FeatureRVE]; in computeTargetABI()
73 FeatureBits[RISCV::FeatureStdExtD]) in computeTargetABI()
80 auto ISAInfo = RISCVFeatures::parseFeatureBits(IsRV64, FeatureBits); in computeTargetABI()
112 void validate(const Triple &TT, const FeatureBitset &FeatureBits) { in validate() argument
113 if (TT.isArch64Bit() && !FeatureBits[RISCV::Feature64Bit]) in validate()
115 if (!TT.isArch64Bit() && !FeatureBits[RISCV::Feature32Bit]) in validate()
117 if (FeatureBits[RISCV::Feature32Bit] && in validate()
118 FeatureBits[RISCV::Feature64Bit]) in validate()
123 parseFeatureBits(bool IsRV64, const FeatureBitset &FeatureBits) { in parseFeatureBits() argument
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| H A D | RISCVBaseInfo.h | 463 ABI computeTargetABI(const Triple &TT, const FeatureBitset &FeatureBits,
480 void validate(const Triple &TT, const FeatureBitset &FeatureBits);
483 parseFeatureBits(bool IsRV64, const FeatureBitset &FeatureBits);
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCSubtargetInfo.h | 92 FeatureBitset FeatureBits; // Feature bits for current CPU + FS variable
112 const FeatureBitset& getFeatureBits() const { return FeatureBits; } in getFeatureBits()
114 FeatureBits = FeatureBits_; in setFeatureBits()
120 return FeatureBits[Feature]; in hasFeature()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 168 FeatureBitset FeatureBits = getFeatureBits(); in initializeSubtargetDependencies() local
170 setFeatureBits(FeatureBits.reset(Hexagon::FeatureDuplex)); in initializeSubtargetDependencies()
171 setFeatureBits(Hexagon_MC::completeHVXFeatures(FeatureBits)); in initializeSubtargetDependencies()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/Disassembler/ |
| H A D | CSKYDisassembler.cpp | 215 const FeatureBitset &FeatureBits = in DecodeGPRPairRegisterClass() local
217 bool hasHighReg = FeatureBits[CSKY::FeatureHighreg]; in DecodeGPRPairRegisterClass()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 2794 if (!FeatureBits[ARM::HasV8_1aOps] || in DecodeSETPANInstruction()
2795 !FeatureBits[ARM::HasV8Ops]) in DecodeSETPANInstruction()
4831 const FeatureBitset &FeatureBits = in DecodeThumbTableBranch() local
4976 const FeatureBitset &FeatureBits = in DecodeMSRMask() local
4979 if (FeatureBits[ARM::FeatureMClass]) { in DecodeMSRMask()
4999 if (!(FeatureBits[ARM::HasV7Ops])) in DecodeMSRMask()
5007 if (!(FeatureBits[ARM::HasV8MMainlineOps])) in DecodeMSRMask()
5017 if (!(FeatureBits[ARM::Feature8MSecExt])) in DecodeMSRMask()
5036 if (!(FeatureBits[ARM::FeaturePACBTI])) in DecodeMSRMask()
5047 if (!(FeatureBits[ARM::HasV7Ops])) { in DecodeMSRMask()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMInstPrinter.cpp | 880 const FeatureBitset &FeatureBits = STI.getFeatureBits(); in printMSRMaskOperand() local
881 if (FeatureBits[ARM::FeatureMClass]) { in printMSRMaskOperand()
887 if (Opcode == ARM::t2MSR_M && FeatureBits[ARM::FeatureDSP]) { in printMSRMaskOperand()
897 if (Opcode == ARM::t2MSR_M && FeatureBits [ARM::HasV7Ops]) { in printMSRMaskOperand()
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| /freebsd-14.2/sys/dev/aac/ |
| H A D | aacreg.h | 639 u_int32_t FeatureBits; member
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| /freebsd-14.2/sys/dev/aacraid/ |
| H A D | aacraid_reg.h | 615 u_int32_t FeatureBits; member
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| H A D | aacraid.c | 2508 sc->aac_feature_bits = le32toh(supp_info->FeatureBits); in aac_describe_controller()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/ |
| H A D | RISCVAsmParser.cpp | 259 FeatureBitset FeatureBits = FeatureBitStack.pop_back_val(); in popFeatureBits() local
260 copySTI().setFeatureBits(FeatureBits); in popFeatureBits()
261 setAvailableFeatures(ComputeAvailableFeatures(FeatureBits)); in popFeatureBits()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 473 FeatureBitset FeatureBits = STI.getFeatureBits(); in selectArch() local
474 FeatureBits &= ~MipsAssemblerOptions::AllArchRelatedMask; in selectArch()
475 STI.setFeatureBits(FeatureBits); in selectArch()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 5422 const FeatureBitset &FeatureBits = Subtarget->getFeatureBits(); in getMClassRegisterMask() local
5423 if (!TheReg || !TheReg->hasRequiredFeatures(FeatureBits)) in getMClassRegisterMask()
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