| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 986 FSINCOS, enumerator
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 208 case ISD::FSINCOS: return "fsincos"; in getOperationName()
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| H A D | LegalizeDAG.cpp | 2314 if (User->getOpcode() == OtherOpcode || User->getOpcode() == ISD::FSINCOS) in useSinCos()
3574 if ((TLI.isOperationLegalOrCustom(ISD::FSINCOS, VT) || in ExpandNode()
3578 Tmp1 = DAG.getNode(ISD::FSINCOS, dl, VTs, Node->getOperand(0)); in ExpandNode()
4436 case ISD::FSINCOS: in ConvertNodeToLibcall()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ScheduleAtom.td | 928 def : InstRW<[AtomWrite01_174], (instrs FSINCOS, FSIN, FCOS)>;
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| H A D | X86InstrFPStack.td | 660 def FSINCOS : I<0xD9, MRM_FB, (outs), (ins), "fsincos", []>;
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| H A D | X86ISelLowering.cpp | 564 setOperationAction(ISD::FSINCOS, VT, Action); in X86TargetLowering()
620 setOperationAction(ISD::FSINCOS, VT, Expand); in X86TargetLowering()
695 setOperationAction(ISD::FSINCOS, MVT::f32, Expand); in X86TargetLowering()
701 setOperationAction(ISD::FSINCOS, MVT::f64, Expand); in X86TargetLowering()
716 setOperationAction(ISD::FSINCOS, VT, Expand); in X86TargetLowering()
785 setOperationAction(ISD::FSINCOS, MVT::f80, Expand); in X86TargetLowering()
842 setOperationAction(ISD::FSINCOS, MVT::f128, LibCall); in X86TargetLowering()
895 setOperationAction(ISD::FSINCOS, VT, Expand); in X86TargetLowering()
2393 setOperationAction(ISD::FSINCOS, MVT::f64, Custom); in X86TargetLowering()
2394 setOperationAction(ISD::FSINCOS, MVT::f32, Custom); in X86TargetLowering()
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1810 setOperationAction(ISD::FSINCOS, MVT::f128, Expand); in SparcTargetLowering()
1815 setOperationAction(ISD::FSINCOS, MVT::f64, Expand); in SparcTargetLowering()
1820 setOperationAction(ISD::FSINCOS, MVT::f32, Expand); in SparcTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 120 ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, in CSKYTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1589 {ISD::FDIV, ISD::FREM, ISD::FSQRT, ISD::FSIN, ISD::FCOS, ISD::FSINCOS, in HexagonTargetLowering()
1638 ISD::FMINNUM, ISD::FMAXNUM, ISD::FSINCOS, ISD::FLDEXP, in HexagonTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 183 setOperationAction(ISD::FSINCOS, MVT::f32, Expand); in LoongArchTargetLowering()
216 setOperationAction(ISD::FSINCOS, MVT::f64, Expand); in LoongArchTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 431 setOperationAction(ISD::FSINCOS, MVT::f32, Expand); in MipsTargetLowering()
432 setOperationAction(ISD::FSINCOS, MVT::f64, Expand); in MipsTargetLowering()
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| H A D | MipsSEISelLowering.cpp | 146 setOperationAction(ISD::FSINCOS, MVT::f16, Promote); in MipsSETargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 125 {ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, ISD::FREM, ISD::FMA}) in WebAssemblyTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 504 setOperationAction(ISD::FSINCOS, MVT::f128, Expand); in AArch64TargetLowering()
683 ISD::FCOS, ISD::FSIN, ISD::FSINCOS, in AArch64TargetLowering()
911 setOperationAction(ISD::FSINCOS, MVT::f64, Custom); in AArch64TargetLowering()
912 setOperationAction(ISD::FSINCOS, MVT::f32, Custom); in AArch64TargetLowering()
914 setOperationAction(ISD::FSINCOS, MVT::f64, Expand); in AArch64TargetLowering()
915 setOperationAction(ISD::FSINCOS, MVT::f32, Expand); in AArch64TargetLowering()
1497 setOperationAction(ISD::FSINCOS, VT, Expand); in AArch64TargetLowering()
6266 case ISD::FSINCOS: in LowerOperation()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1461 setOperationAction(ISD::FSINCOS, MVT::f64, Expand); in ARMTargetLowering()
1462 setOperationAction(ISD::FSINCOS, MVT::f32, Expand); in ARMTargetLowering()
1504 setOperationAction(ISD::FSINCOS, MVT::f64, Custom); in ARMTargetLowering()
1505 setOperationAction(ISD::FSINCOS, MVT::f32, Custom); in ARMTargetLowering()
1543 setOperationAction(ISD::FSINCOS, MVT::f16, Promote); in ARMTargetLowering()
10660 case ISD::FSINCOS: return LowerFSINCOS(Op, DAG); in LowerOperation()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 391 setOperationAction(ISD::FSINCOS, MVT::f64, Expand); in PPCTargetLowering()
396 setOperationAction(ISD::FSINCOS, MVT::f32, Expand); in PPCTargetLowering()
1179 setOperationAction(ISD::FSINCOS, MVT::f128, Expand); in PPCTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 434 ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, in RISCVTargetLowering()
497 ISD::FCOS, ISD::FSIN, ISD::FSINCOS, ISD::FEXP, in RISCVTargetLowering()
963 setOperationAction(ISD::FSINCOS, VT, Expand); in RISCVTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 516 setOperationAction(ISD::FSINCOS, VT, Expand); in SystemZTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 12393 case ISD::FSINCOS: in isCanonicalized()
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