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Searched refs:FP_TO_UINT (Results 1 – 25 of 39) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.cpp2380 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f32, 1 }, in getCastInstrCost()
2381 { ISD::FP_TO_UINT, MVT::v4i32, MVT::v4f32, 1 }, in getCastInstrCost()
2382 { ISD::FP_TO_UINT, MVT::v2i64, MVT::v2f64, 1 }, in getCastInstrCost()
2388 { ISD::FP_TO_UINT, MVT::v2i64, MVT::v2f32, 2 }, in getCastInstrCost()
2389 { ISD::FP_TO_UINT, MVT::v2i16, MVT::v2f32, 1 }, in getCastInstrCost()
2390 { ISD::FP_TO_UINT, MVT::v2i8, MVT::v2f32, 1 }, in getCastInstrCost()
2395 { ISD::FP_TO_UINT, MVT::v4i16, MVT::v4f32, 2 }, in getCastInstrCost()
2396 { ISD::FP_TO_UINT, MVT::v4i8, MVT::v4f32, 2 }, in getCastInstrCost()
2412 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f64, 2 }, in getCastInstrCost()
2570 {ISD::FP_TO_UINT, MVT::v4i8, MVT::v4f16, 1}, in getCastInstrCost()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86TargetTransformInfo.cpp2225 { ISD::FP_TO_UINT, MVT::v8i64, MVT::v8f32, 1 }, in getCastInstrCost()
2226 { ISD::FP_TO_UINT, MVT::v8i64, MVT::v8f64, 1 }, in getCastInstrCost()
2361 { ISD::FP_TO_UINT, MVT::v8i32, MVT::v8f64, 1 }, in getCastInstrCost()
2362 { ISD::FP_TO_UINT, MVT::v8i16, MVT::v8f64, 3 }, in getCastInstrCost()
2363 { ISD::FP_TO_UINT, MVT::v8i8, MVT::v8f64, 3 }, in getCastInstrCost()
2364 { ISD::FP_TO_UINT, MVT::v16i32, MVT::v16f32, 1 }, in getCastInstrCost()
2365 { ISD::FP_TO_UINT, MVT::v16i16, MVT::v16f32, 3 }, in getCastInstrCost()
2366 { ISD::FP_TO_UINT, MVT::v16i8, MVT::v16f32, 3 }, in getCastInstrCost()
2474 { ISD::FP_TO_UINT, MVT::v2i64, MVT::v4f32, 1 }, in getCastInstrCost()
2475 { ISD::FP_TO_UINT, MVT::v4i64, MVT::v4f32, 1 }, in getCastInstrCost()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMTargetTransformInfo.cpp708 { ISD::FP_TO_UINT, MVT::v4i8, MVT::v4f32, 3 }, in getCastInstrCost()
741 { ISD::FP_TO_UINT, MVT::i1, MVT::f32, 2 }, in getCastInstrCost()
743 { ISD::FP_TO_UINT, MVT::i1, MVT::f64, 2 }, in getCastInstrCost()
745 { ISD::FP_TO_UINT, MVT::i8, MVT::f32, 2 }, in getCastInstrCost()
747 { ISD::FP_TO_UINT, MVT::i8, MVT::f64, 2 }, in getCastInstrCost()
749 { ISD::FP_TO_UINT, MVT::i16, MVT::f32, 2 }, in getCastInstrCost()
751 { ISD::FP_TO_UINT, MVT::i16, MVT::f64, 2 }, in getCastInstrCost()
753 { ISD::FP_TO_UINT, MVT::i32, MVT::f32, 2 }, in getCastInstrCost()
755 { ISD::FP_TO_UINT, MVT::i32, MVT::f64, 2 }, in getCastInstrCost()
757 { ISD::FP_TO_UINT, MVT::i64, MVT::f32, 10 }, in getCastInstrCost()
[all …]
H A DARMISelLowering.cpp177 setOperationAction(ISD::FP_TO_UINT, VT, Custom); in addTypeForNEON()
182 setOperationAction(ISD::FP_TO_UINT, VT, Expand); in addTypeForNEON()
308 setOperationAction(ISD::FP_TO_UINT, VT, Expand); in addMVEVectorTypes()
461 setOperationAction(ISD::FP_TO_UINT, VT, Expand); in addMVEVectorTypes()
472 setOperationAction(ISD::FP_TO_UINT, MVT::v2i1, Expand); in addMVEVectorTypes()
949 setOperationAction(ISD::FP_TO_UINT, MVT::v4i16, Custom); in ARMTargetLowering()
950 setOperationAction(ISD::FP_TO_UINT, MVT::v8i16, Custom); in ARMTargetLowering()
1074 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in ARMTargetLowering()
1076 setOperationAction(ISD::FP_TO_UINT, MVT::f64, Custom); in ARMTargetLowering()
10572 case ISD::FP_TO_UINT: return LowerFP_TO_INT(Op, DAG); in LowerOperation()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/IR/
H A DConstrainedOps.def61 DAG_INSTRUCTION(FPToUI, 1, 0, experimental_constrained_fptoui, FP_TO_UINT)
H A DVPIntrinsics.def458 HELPER_REGISTER_FP_CAST_VP(fptoui, VP_FP_TO_UINT, FPToUI, FP_TO_UINT, 0)
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h837 FP_TO_UINT, enumerator
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp257 setOperationAction(ISD::FP_TO_UINT, T, Custom); in initializeHVXLowering()
330 setOperationAction(ISD::FP_TO_UINT, T, Custom); in initializeHVXLowering()
427 setOperationAction(ISD::FP_TO_UINT, VecTy, Custom); in initializeHVXLowering()
2276 Op.getOpcode() == ISD::FP_TO_UINT); in LowerHvxFpToInt()
2676 assert(Opc == ISD::FP_TO_SINT || Opc == ISD::FP_TO_UINT || in EqualizeFpIntConversion()
2699 assert(Opc == ISD::FP_TO_SINT || Opc == ISD::FP_TO_UINT); in ExpandHvxFpToInt()
2816 assert(Opc == ISD::FP_TO_UINT); in ExpandHvxFpToInt()
3157 case ISD::FP_TO_UINT: in LowerHvxOperation()
3235 case ISD::FP_TO_UINT: return LowerHvxFpToInt(Op, DAG); in LowerHvxOperation()
3406 case ISD::FP_TO_UINT: in LowerHvxOperationWrapper()
[all …]
H A DHexagonISelLowering.cpp1772 setOperationAction(ISD::FP_TO_UINT, MVT::i1, Promote); in HexagonTargetLowering()
1773 setOperationAction(ISD::FP_TO_UINT, MVT::i8, Promote); in HexagonTargetLowering()
1774 setOperationAction(ISD::FP_TO_UINT, MVT::i16, Promote); in HexagonTargetLowering()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp382 case ISD::FP_TO_UINT: in LegalizeOp()
693 case ISD::FP_TO_UINT: in Promote()
832 if (NewOpc == ISD::FP_TO_UINT && in PromoteFP_TO_INT()
852 if (Node->getOpcode() == ISD::FP_TO_UINT || in PromoteFP_TO_INT()
940 case ISD::FP_TO_UINT: in Expand()
H A DSelectionDAGDumper.cpp371 case ISD::FP_TO_UINT: return "fp_to_uint"; in getOperationName()
H A DLegalizeFloatTypes.cpp926 case ISD::FP_TO_UINT: Res = SoftenFloatOp_FP_TO_XINT(N); break; in SoftenFloatOperand()
1902 case ISD::FP_TO_UINT: Res = ExpandFloatOp_FP_TO_XINT(N); break; in ExpandFloatOperand()
2233 case ISD::FP_TO_UINT: in PromoteFloatOperand()
3136 case ISD::FP_TO_UINT: Res = SoftPromoteHalfOp_FP_TO_XINT(N); break; in SoftPromoteHalfOperand()
H A DLegalizeIntegerTypes.cpp158 case ISD::FP_TO_UINT: Res = PromoteIntRes_FP_TO_XINT(N); break; in PromoteIntegerResult()
732 if (N->getOpcode() == ISD::FP_TO_UINT && in PromoteIntRes_FP_TO_XINT()
733 !TLI.isOperationLegal(ISD::FP_TO_UINT, NVT) && in PromoteIntRes_FP_TO_XINT()
768 return DAG.getNode((N->getOpcode() == ISD::FP_TO_UINT || in PromoteIntRes_FP_TO_XINT()
2638 case ISD::FP_TO_UINT: ExpandIntRes_FP_TO_XINT(N, Lo, Hi); break; in ExpandIntegerResult()
3745 Op = DAG.getNode(IsSigned ? ISD::FP_TO_SINT : ISD::FP_TO_UINT, dl, VT, Op); in ExpandIntRes_FP_TO_XINT()
H A DLegalizeVectorTypes.cpp102 case ISD::FP_TO_UINT: in ScalarizeVectorResult()
683 case ISD::FP_TO_UINT: in ScalarizeVectorOperand()
1100 case ISD::FP_TO_UINT: in SplitVectorResult()
3027 case ISD::FP_TO_UINT: in SplitVectorOperand()
4244 case ISD::FP_TO_UINT: in WidenVectorResult()
6074 case ISD::FP_TO_UINT: in WidenVectorOperand()
H A DLegalizeDAG.cpp2924 OpToUse = IsStrict ? ISD::STRICT_FP_TO_UINT : ISD::FP_TO_UINT; in PromoteLegalFP_TO_INT()
3354 case ISD::FP_TO_UINT: in ExpandNode()
4702 case ISD::FP_TO_UINT: in ConvertNodeToLibcall()
5002 case ISD::FP_TO_UINT: in PromoteNode()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp438 {ISD::UINT_TO_FP, ISD::SINT_TO_FP, ISD::FP_TO_SINT, ISD::FP_TO_UINT}, in AMDGPUTargetLowering()
459 ISD::FP_TO_UINT, ISD::MUL, ISD::MULHU, in AMDGPUTargetLowering()
1363 case ISD::FP_TO_UINT: in LowerOperation()
1888 ISD::NodeType ToInt = Sign ? ISD::FP_TO_SINT : ISD::FP_TO_UINT; in LowerDIVREM24()
2043 SDValue Rcp_Lo = DAG.getNode(ISD::FP_TO_UINT, DL, HalfVT, Mad2); in LowerUDIVREM64()
2044 SDValue Rcp_Hi = DAG.getNode(ISD::FP_TO_UINT, DL, HalfVT, Trunc); in LowerUDIVREM64()
3449 : ISD::FP_TO_UINT, in LowerFP_TO_INT64()
3451 SDValue Lo = DAG.getNode(ISD::FP_TO_UINT, SL, MVT::i32, Fma); in LowerFP_TO_INT64()
H A DR600ISelLowering.cpp110 setOperationAction({ISD::FP_TO_UINT, ISD::FP_TO_SINT}, {MVT::i1, MVT::i64}, in R600TargetLowering()
586 case ISD::FP_TO_UINT: in ReplaceNodeResults()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp277 setOperationAction(ISD::FP_TO_UINT, MVT::i1, Promote); in PPCTargetLowering()
278 AddPromotedToType(ISD::FP_TO_UINT, MVT::i1, in PPCTargetLowering()
307 setOperationAction(ISD::FP_TO_UINT, MVT::ppcf128, Custom); in PPCTargetLowering()
687 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Expand); in PPCTargetLowering()
693 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in PPCTargetLowering()
703 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Legal); in PPCTargetLowering()
728 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in PPCTargetLowering()
915 setOperationAction(ISD::FP_TO_UINT, MVT::v4i32, Legal); in PPCTargetLowering()
11643 case ISD::FP_TO_UINT: in LowerOperation()
11764 case ISD::FP_TO_UINT: { in ReplaceNodeResults()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp118 setOperationAction(ISD::FP_TO_UINT, GRLenVT, Custom); in LoongArchTargetLowering()
191 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in LoongArchTargetLowering()
270 setOperationAction({ISD::FP_TO_SINT, ISD::FP_TO_UINT}, VT, Legal); in LoongArchTargetLowering()
316 setOperationAction({ISD::FP_TO_SINT, ISD::FP_TO_UINT}, VT, Legal); in LoongArchTargetLowering()
1873 case ISD::FP_TO_UINT: { in ReplaceNodeResults()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1695 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in SparcTargetLowering()
1697 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom); in SparcTargetLowering()
3265 case ISD::FP_TO_UINT: return LowerFP_TO_UINT(Op, DAG, *this, in LowerOperation()
3613 case ISD::FP_TO_UINT: in ReplaceNodeResults()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVTargetTransformInfo.cpp886 case ISD::FP_TO_UINT: in getCastInstrCost()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp521 ISD::FP_TO_SINT, ISD::FP_TO_UINT, ISD::FSHL, ISD::FSHR, in NVPTXTargetLowering()
697 ISD::MULHU, ISD::FP_TO_SINT, ISD::FP_TO_UINT, in NVPTXTargetLowering()
781 {ISD::SINT_TO_FP, ISD::UINT_TO_FP, ISD::FP_TO_SINT, ISD::FP_TO_UINT}, in NVPTXTargetLowering()
2715 case ISD::FP_TO_UINT: in LowerOperation()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp213 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Promote); // use i64 in initSPUActions()
215 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Expand); in initSPUActions()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp227 setOperationAction(ISD::FP_TO_UINT, VT, Expand); in SystemZTargetLowering()
271 setOperationAction(ISD::FP_TO_UINT, MVT::i128, LibCall); in SystemZTargetLowering()
458 setOperationAction(ISD::FP_TO_UINT, MVT::v2i64, Legal); in SystemZTargetLowering()
459 setOperationAction(ISD::FP_TO_UINT, MVT::v2f64, Legal); in SystemZTargetLowering()
478 setOperationAction(ISD::FP_TO_UINT, MVT::v4i32, Legal); in SystemZTargetLowering()
479 setOperationAction(ISD::FP_TO_UINT, MVT::v4f32, Legal); in SystemZTargetLowering()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp1881 case FPToUI: return ISD::FP_TO_UINT; in InstructionOpcodeToISD()

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