Searched refs:FPRRC (Results 1 – 4 of 4) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVTargetTransformInfo.h | 312 enum RISCVRegisterClass { GPRRC, FPRRC, VRRC }; enumerator
319 case RISCVRegisterClass::FPRRC: in getNumberOfRegisters()
343 return RISCVRegisterClass::FPRRC;
353 case RISCVRegisterClass::FPRRC: in getRegisterClassName()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCTargetTransformInfo.cpp | 449 assert(ClassID == GPRRC || ClassID == FPRRC || in getNumberOfRegisters()
455 assert(ClassID == GPRRC || ClassID == FPRRC || ClassID == VRRC); in getNumberOfRegisters()
464 return ST->hasVSX() ? VSXRC : FPRRC; in getRegisterClassForType()
481 case FPRRC: return "PPC::FPRRC"; in getRegisterClassName()
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| H A D | PPCTargetTransformInfo.h | 94 GPRRC, FPRRC, VRRC, VSXRC enumerator
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 2663 const TargetRegisterClass &FPRRC = *getRegClassForTypeOnBank(DefTy, RB); in select() local
2689 return RBI.constrainGenericRegister(DefReg, FPRRC, MRI); in select()
2702 if (!RBI.constrainGenericRegister(DefReg, FPRRC, MRI)) { in select()
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