Searched refs:FPR128 (Results 1 – 8 of 8) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.td | 4812 (ins FPR128:$Rn, FPR128:$Rm, ccode:$cond), 4814 (AArch64csel FPR128:$Rn, FPR128:$Rm, 5671 (FRECPSv4f32 FPR128:$Rn, FPR128:$Rm)>; 5675 (FRECPSv2f64 FPR128:$Rn, FPR128:$Rm)>; 5711 (FRSQRTSv4f32 FPR128:$Rn, FPR128:$Rm)>; 5715 (FRSQRTSv2f64 FPR128:$Rn, FPR128:$Rm)>; 8674 def : Pat<(f128 (bitconvert (v2i64 FPR128:$src))), (f128 FPR128:$src)>; 8675 def : Pat<(f128 (bitconvert (v4i32 FPR128:$src))), (f128 FPR128:$src)>; 8676 def : Pat<(f128 (bitconvert (v8i16 FPR128:$src))), (f128 FPR128:$src)>; 8677 def : Pat<(f128 (bitconvert (v2f64 FPR128:$src))), (f128 FPR128:$src)>; [all …]
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| H A D | AArch64RegisterInfo.td | 458 def FPR128 : RegisterClass<"AArch64", 468 128, (trunc FPR128, 16)>; 475 128, (trunc FPR128, 8)>; 496 def QSeqPairs : RegisterTuples<[qsub0, qsub1], [(rotl FPR128, 0), (rotl FPR128, 1)]>; 498 [(rotl FPR128, 0), (rotl FPR128, 1), 499 (rotl FPR128, 2)]>; 501 [(rotl FPR128, 0), (rotl FPR128, 1), 502 (rotl FPR128, 2), (rotl FPR128, 3)]>; 529 def V128 : RegisterOperand<FPR128, "printVRegOperand"> { 667 defm VecListOne : VectorList<1, FPR64, FPR128>; [all …]
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| H A D | AArch64FrameLowering.cpp | 2757 enum RegType { GPR, FPR64, FPR128, PPR, ZPR } Type; enumerator 2771 case FPR128: in getScale() 2829 RPI.Type = RegPairInfo::FPR128; in computeCalleeSaveRegisterPairs() 2855 case RegPairInfo::FPR128: in computeCalleeSaveRegisterPairs() 2922 !RPI.isScalable() && RPI.Type != RegPairInfo::FPR128 && in computeCalleeSaveRegisterPairs() 3033 case RegPairInfo::FPR128: in spillCalleeSavedRegisters() 3137 case RegPairInfo::FPR128: in restoreCalleeSavedRegisters()
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| H A D | AArch64InstrFormats.td | 11584 : SHA3OpTiedInst<opc, asm, "", (outs FPR128:$dst), 11585 (ins FPR128:$Rd, FPR32:$Rn, V128:$Rm), 11586 [(set (v4i32 FPR128:$dst), 11587 (OpNode (v4i32 FPR128:$Rd), (i32 FPR32:$Rn), 11598 : SHA3OpTiedInst<opc, asm, "", (outs FPR128:$dst), 11599 (ins FPR128:$Rd, FPR128:$Rn, V128:$Rm), 11600 [(set (v4i32 FPR128:$dst), 11601 (OpNode (v4i32 FPR128:$Rd), (v4i32 FPR128:$Rn), 11680 : CryptoRRR<op0, op1, (outs FPR128:$Vdst), (ins FPR128:$Vd, FPR128:$Vn, V128:$Vm),
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| H A D | AArch64SMEInstrInfo.td | 209 …defm _FPR128 : CoalescerBarrierPseudo<FPR128, [f128, v16i8, v8i16, v4i32, v2i64, v8f16, v4f32, v2f…
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCTargetDesc.cpp | 311 const auto &FPR128 = AArch64MCRegisterClasses[AArch64::FPR128RegClassID]; in isQForm() local 313 return Op.isReg() && FPR128.contains(Op.getReg()); in isQForm() 318 const auto &FPR128 = AArch64MCRegisterClasses[AArch64::FPR128RegClassID]; in isFpOrNEON() local 328 return FPR128.contains(Reg) || FPR64.contains(Reg) || FPR32.contains(Reg) || in isFpOrNEON()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZRegisterInfo.td | 217 class FPR128<bits<16> num, string n, FPR64 low, FPR64 high> 237 def F#I#Q : FPR128<I, "f"#I, !cast<FPR64>("F"#!add(I, 2)#"D"),
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYRegisterInfo.td | 203 def FPR128 : RegisterClass<"CSKY",
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