| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | ZOSLibcallNames.def | 37 HANDLE_LIBCALL(POW_F32, "@@FPOW@B")
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | ConstrainedOps.def | 90 DAG_FUNCTION(pow, 2, 1, experimental_constrained_pow, FPOW)
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 934 FPOW, enumerator
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| H A D | BasicTTIImpl.h | 1953 ISD = ISD::FPOW; in getTypeBasedIntrinsicInstrCost()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 282 case ISD::FPOW: return "fpow"; in getOperationName()
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| H A D | LegalizeFloatTypes.cpp | 113 case ISD::FPOW: R = SoftenFloatRes_FPOW(N); break; in SoftenFloatResult()
1338 case ISD::FPOW: ExpandFloatRes_FPOW(N, Lo, Hi); break; in ExpandFloatResult()
2430 case ISD::FPOW: in PromoteFloatResult()
2839 case ISD::FPOW: in SoftPromoteHalfResult()
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| H A D | LegalizeDAG.cpp | 4537 SDValue FPOW = in ConvertNodeToLibcall() local
4541 Results.push_back(FPOW); in ConvertNodeToLibcall()
4542 Results.push_back(FPOW.getValue(1)); in ConvertNodeToLibcall()
4547 Results.push_back(DAG.getNode(ISD::FPOW, SDLoc(Node), in ConvertNodeToLibcall()
4567 case ISD::FPOW: in ConvertNodeToLibcall()
5260 case ISD::FPOW: in PromoteNode()
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| H A D | LegalizeVectorOps.cpp | 397 case ISD::FPOW: in LegalizeOp()
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| H A D | LegalizeVectorTypes.cpp | 147 case ISD::FPOW: in ScalarizeVectorResult()
1152 case ISD::FPOW: in SplitVectorResult()
4173 case ISD::FPOW: in WidenVectorResult()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1831 setOperationAction(ISD::FPOW , MVT::f128, Expand); in SparcTargetLowering()
1832 setOperationAction(ISD::FPOW , MVT::f64, Expand); in SparcTargetLowering()
1833 setOperationAction(ISD::FPOW , MVT::f32, Expand); in SparcTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 120 ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, in CSKYTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1590 ISD::FPOW, ISD::FCOPYSIGN}) { in HexagonTargetLowering()
1635 ISD::FCOS, ISD::FPOW, ISD::FLOG, ISD::FLOG2, in HexagonTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 184 setOperationAction(ISD::FPOW, MVT::f32, Expand); in LoongArchTargetLowering()
217 setOperationAction(ISD::FPOW, MVT::f64, Expand); in LoongArchTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 393 setOperationAction(ISD::FPOW , MVT::f64, Expand); in PPCTargetLowering()
398 setOperationAction(ISD::FPOW , MVT::f32, Expand); in PPCTargetLowering()
405 setOperationAction(ISD::FPOW , MVT::f64, Custom); in PPCTargetLowering()
411 setOperationAction(ISD::FPOW , MVT::f32, Custom); in PPCTargetLowering()
870 setOperationAction(ISD::FPOW, VT, Expand); in PPCTargetLowering()
1182 setOperationAction(ISD::FPOW, MVT::f128, Expand); in PPCTargetLowering()
11603 case ISD::FPOW: return lowerPow(Op, DAG); in LowerOperation()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 433 setOperationAction(ISD::FPOW, MVT::f32, Expand); in MipsTargetLowering()
434 setOperationAction(ISD::FPOW, MVT::f64, Expand); in MipsTargetLowering()
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| H A D | MipsSEISelLowering.cpp | 142 setOperationAction(ISD::FPOW, MVT::f16, Promote); in MipsSETargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 368 setOperationAction(ISD::FPOW, VT, Expand); in addMVEVectorTypes()
878 setOperationAction(ISD::FPOW, MVT::v2f64, Expand); in ARMTargetLowering()
900 setOperationAction(ISD::FPOW, MVT::v4f32, Expand); in ARMTargetLowering()
917 setOperationAction(ISD::FPOW, MVT::v2f32, Expand); in ARMTargetLowering()
1059 setOperationAction(ISD::FPOW, MVT::f64, Expand); in ARMTargetLowering()
1470 setOperationAction(ISD::FPOW, MVT::f64, Expand); in ARMTargetLowering()
1471 setOperationAction(ISD::FPOW, MVT::f32, Expand); in ARMTargetLowering()
1545 setOperationAction(ISD::FPOW, MVT::f16, Promote); in ARMTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 125 {ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, ISD::FREM, ISD::FMA}) in WebAssemblyTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 252 setOperationAction(ISD::FPOW, VT, Expand); in initSPUActions()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 157 case ISD::FPOW: in fp16SrcZerosHighBits()
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| H A D | AMDGPUISelLowering.cpp | 343 setOperationAction({ISD::FCEIL, ISD::FPOW, ISD::FABS, ISD::FFLOOR, in AMDGPUTargetLowering()
483 ISD::FLOG, ISD::FLOG10, ISD::FPOW, in AMDGPUTargetLowering()
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| H A D | SIISelLowering.cpp | 211 ISD::FSIN, ISD::FCOS, ISD::FPOW, ISD::FPOWI, in SITargetLowering()
474 setOperationAction({ISD::FPOW, ISD::FPOWI}, MVT::f16, Promote); in SITargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 514 def fpow : SDNode<"ISD::FPOW" , SDTFPBinOp>;
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 500 setOperationAction(ISD::FPOW, MVT::f128, Expand); in AArch64TargetLowering()
673 setOperationAction(ISD::FPOW, MVT::f32, Expand); in AArch64TargetLowering()
674 setOperationAction(ISD::FPOW, MVT::f64, Expand); in AArch64TargetLowering()
682 for (auto Op : {ISD::FREM, ISD::FPOW, ISD::FPOWI, in AArch64TargetLowering()
1493 setOperationAction(ISD::FPOW, VT, Expand); in AArch64TargetLowering()
1685 setOperationAction(ISD::FPOW, VT, Expand); in addTypeForNEON()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 434 ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, in RISCVTargetLowering()
496 setOperationAction({ISD::FREM, ISD::FPOW, ISD::FPOWI, in RISCVTargetLowering()
960 setOperationAction(ISD::FPOW, VT, Expand); in RISCVTargetLowering()
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