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/freebsd-14.2/sys/contrib/device-tree/Bindings/fpga/
H A Dfpga-region.txt9 - FPGA Region
18 FPGA Regions represent FPGA's and partial reconfiguration regions of FPGA's in
57 FPGA Bridge
58 * FPGA Bridges gate bus signals between a host and FPGA.
72 FPGA Manager
112 2. Program the FPGA using the FPGA manager.
121 FPGA Region
124 FPGA Regions represent FPGA's and FPGA PR regions in the device tree. An FPGA
155 If an FPGA Region does not specify an FPGA Manager, it will inherit the FPGA
322 The live Device Tree must contain an FPGA Region, an FPGA Manager, and any FPGA
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H A Daltera-socfpga-fpga-mgr.txt1 Altera SOCFPGA FPGA Manager
6 - The first index is for FPGA manager register access.
7 - The second index is for writing FPGA configuration data.
8 - interrupts : interrupt for the FPGA Manager device.
H A Daltera-socfpga-a10-fpga-mgr.txt1 Altera SOCFPGA Arria10 FPGA Manager
6 - The first index is for FPGA manager register access.
7 - The second index is for writing FPGA configuration data.
H A Dlattice-machxo2-spi.txt1 Lattice MachXO2 Slave SPI FPGA Manager
10 - reg: spi chip select of the FPGA
12 Example for full FPGA configuration:
H A Dlattice,sysconfig.yaml7 title: Lattice Slave SPI sysCONFIG FPGA manager
13 Lattice sysCONFIG port, which is used for FPGA configuration, among others,
18 format into FPGA's SRAM configuration memory.
37 Indicates that the FPGA is ready to be configured.
H A Dxilinx-slave-serial.txt1 Xilinx Slave Serial SPI FPGA Manager
15 - reg: spi chip select of the FPGA
23 Example for full FPGA configuration:
H A Dxilinx-zynq-fpga-mgr.txt1 Xilinx Zynq FPGA Manager
6 - interrupts: interrupt for the FPGA manager device
H A Dxlnx,versal-fpga.yaml7 title: Xilinx Versal FPGA driver.
13 Device Tree Versal FPGA bindings for the Versal SoC, controlled
H A Dxlnx,zynqmp-pcap-fpga.txt1 Devicetree bindings for Zynq Ultrascale MPSoC FPGA Manager.
8 Example for full FPGA configuration:
H A Dxlnx,zynqmp-pcap-fpga.yaml7 title: Xilinx Zynq Ultrascale MPSoC FPGA Manager
13 Device Tree Bindings for Zynq Ultrascale MPSoC FPGA Manager.
H A Dlattice-ice40-fpga-mgr.txt1 Lattice iCE40 FPGA Manager
10 FPGA will enter Master SPI mode and drive SCK with a
/freebsd-14.2/sys/contrib/device-tree/Bindings/bus/
H A Dts-nbus.txt4 Systems FPGA on the TS-4600 SoM.
10 - pwms : The PWM bound to the FPGA
11 - ts,data-gpios : The 8 GPIO pins connected to the data lines on the FPGA
12 - ts,csn-gpios : The GPIO pin connected to the csn line on the FPGA
13 - ts,txrx-gpios : The GPIO pin connected to the txrx line on the FPGA
14 - ts,strobe-gpios : The GPIO pin connected to the stobe line on the FPGA
15 - ts,ale-gpios : The GPIO pin connected to the ale line on the FPGA
16 - ts,rdy-gpios : The GPIO pin connected to the rdy line on the FPGA
/freebsd-14.2/sys/contrib/device-tree/Bindings/board/
H A Dfsl-board.txt20 * Freescale on-board FPGA
22 This is the memory-mapped registers for on board FPGA.
26 indicating the type of FPGA. Example:
29 - reg: should contain the address and the length of the FPGA register set.
50 * Freescale on-board FPGA connected on I2C bus
52 Some Freescale boards like BSC9132QDS have on board FPGA connected on
57 indicating the type of FPGA. Example:
59 - reg: Should contain the address of the FPGA
/freebsd-14.2/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Darm,versatile-fpga-irq.txt1 * ARM Versatile FPGA interrupt controller
3 One or more FPGA IRQ controllers can be synthesized in an ARM reference board
12 as the FPGA IRQ controller has no configuration options for interrupt
14 - reg: The register bank for the FPGA interrupt controller.
34 - interrupts: if the FPGA IRQ controller is cascaded, i.e. if its IRQ
H A Dtechnologic,ts4800.txt1 TS-4800 FPGA interrupt controller
3 TS-4800 FPGA has an internal interrupt controller. When one of the
/freebsd-14.2/sys/contrib/device-tree/Bindings/gpio/
H A Dgpio-ts4900.txt1 * Technologic Systems I2C-FPGA's GPIO controller bindings
3 This bindings describes the GPIO controller for Technologic's FPGA core.
4 TS-4900's FPGA encodes the GPIO state on 3 bits, whereas the TS-7970's FPGA
/freebsd-14.2/sys/contrib/device-tree/Bindings/net/
H A Dmdio-mux-mmioreg.txt4 like an FPGA, is used to control which child bus is connected. The mdio-mux
23 The FPGA node defines a memory-mapped FPGA with a register space of 0x30 bytes.
28 /* The FPGA node */
/freebsd-14.2/sys/contrib/device-tree/Bindings/
H A Dxilinx.txt10 Each IP-core has a set of parameters which the FPGA designer can use to
15 to be recompiled every time the FPGA bitstream is resynthesized.
18 generate a new device tree each time the FPGA bitstream changes. The
107 The Xilinx SystemACE device is used to program FPGAs from an FPGA
131 of the FPGA through the Internal Configuration Access Port
132 (ICAP). The ICAP enables partial reconfiguration of the FPGA,
134 'warm boots' of the FPGA fabric.
137 - xlnx,family : The family of the FPGA, necessary since the
/freebsd-14.2/sys/contrib/device-tree/Bindings/powerpc/4xx/
H A Dakebono.txt34 1.c) The FPGA node
37 number in an FPGA which is represented by this node.
42 - reg : should contain the FPGA registers location and length.
/freebsd-14.2/sys/contrib/device-tree/Bindings/input/touchscreen/
H A Dts4800-ts.txt8 describes the FPGA's syscon registers.
9 - phandle to FPGA's syscon
/freebsd-14.2/sys/contrib/device-tree/Bindings/watchdog/
H A Dts4800-wdt.txt6 describes the FPGA's syscon registers.
7 - phandle to FPGA's syscon
/freebsd-14.2/sys/contrib/device-tree/src/powerpc/fsl/
H A Dgef_sbc610.dts35 4 0 0xfc000000 0x00008000 // FPGA
36 5 0 0xfc008000 0x00008000 // AFIX FPGA
37 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit)
38 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit)
H A Dgef_ppc9a.dts35 4 0 0xfc000000 0x00008000 // FPGA
36 5 0 0xfc008000 0x00008000 // AFIX FPGA
37 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit)
38 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit)
/freebsd-14.2/sys/contrib/device-tree/Bindings/firmware/
H A Dintel,stratix10-svc.txt4 processor system (HPS) and Secure Device Manager (SDM). When the FPGA is
7 configuration data from that location and perform the FPGA configuration.
17 the services for FPGA configuration, QSPI, Crypto and warm reset. Service layer
/freebsd-14.2/sys/contrib/device-tree/Bindings/mfd/
H A Dbfticu.txt1 KEYMILE bfticu Chassis Management FPGA
9 - interrupt-controller: the bfticu FPGA is an interrupt controller

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