Searched refs:FP16 (Results 1 – 18 of 18) sorted by relevance
1 //===--- arm_fp16.td - ARM FP16 compiler interface ------------------------===//9 // This file defines the TableGen definitions from which the ARM FP16 header16 // ARMv8.2-A FP16 intrinsics.
1656 // ARMv8.2-A FP16 vector intrinsics for A32/A64.1659 // ARMv8.2-A FP16 one-operand vector intrinsics.1697 // ARMv8.2-A FP16 two-operands vector intrinsics.1750 // ARMv8.2-A FP16 three-operands vector intrinsics.1756 // ARMv8.2-A FP16 lane vector intrinsics.1780 // ARMv8.2-A FP16 vector intrinsics for A64 only.1804 // ARMv8.2-A FP16 lane vector intrinsics.1855 // ARMv8.2-A FP16 reduction vector intrinsics.1887 // v8.2-A FP16 fused multiply-add long instructions.
149 // AMX_FP16 FP16
199 //AMX-FP16
184 // FIXME: FP16 scalar intrinsics use the type v8f16, which is supposed to be186 // FIXME: FP16 conversion between f16 and i64 customize type v8i64, which is
4024 // Always select FP16 instructions if available.
11463 // Always select FP16 instructions if available.
1675 let isUnpredicable = 1; // FP16 instructions cannot in general be conditional2024 let isUnpredicable = 1; // FP16 instructions cannot in general be conditional2054 let isUnpredicable = 1; // FP16 instructions cannot in general be conditional2082 let isUnpredicable = 1; // FP16 instructions cannot in general be conditional2113 let isUnpredicable = 1; // FP16 instructions cannot in general be conditional
136 bool IsAddressingMode5(SDValue N, SDValue &Base, SDValue &Offset, bool FP16);988 bool FP16) { in IsAddressingMode5() argument1008 const int Scale = FP16 ? 2 : 4; in IsAddressingMode5()1024 if (FP16) in IsAddressingMode5()1036 if (FP16) in IsAddressingMode5()
43 // 16-bit FP loads/stores/moves, shared between VFP (with the v8.2A FP16
107 "Full FP16 (FEAT_FP16)", [FeatureFPARMv8]>;110 "Enable FP16 FML instructions (FEAT_FHM)", [FeatureFullFP16]>;
2464 // SME2 multi-vec indexed FP8 two-way dot product to FP16 two registers2648 // FMLAL (multiple and indexed vector, FP8 to FP16)
1319 // ARMv8.2-A FP16 Fused Multiply-Add Long1449 // inside the multiclass as the FP16 versions need different predicates.4601 // Pattern for FP16 and BF16 immediates7384 // Patterns for FP16 Intrinsics - requires reg copy to/from as i16s not supported.
6204 // FCVTN (FP16 to FP8)
5425 // AMX-FP16 - Intel FP16 AMX extensions
532 // v8.2-A FP16 Fused Multiply-Add Long
221 // FP16 ops are identified by accumulator & result type.
1150 // Loads FP16 constant into a register.