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Searched refs:FNMSUB (Results 1 – 16 of 16) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineCombinerPattern.h177 FNMSUB, enumerator
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86InstComments.cpp359 CASE_FMA4_PACKED_RR(FNMSUB) in printFMAComments()
360 CASE_FMA4_SCALAR_RR(FNMSUB) in printFMAComments()
363 CASE_FMA4_PACKED_RM(FNMSUB) in printFMAComments()
364 CASE_FMA4_SCALAR_RM(FNMSUB) in printFMAComments()
370 CASE_FMA4_PACKED_MR(FNMSUB) in printFMAComments()
371 CASE_FMA4_SCALAR_MR(FNMSUB) in printFMAComments()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCSchedPredicates.td59 FNMSUB,
H A DPPCISelLowering.h168 FNMSUB, enumerator
H A DP10InstrResources.td210 FNMSUB,
H A DP9InstrResources.td427 FNMSUB,
H A DPPCISelLowering.cpp1813 case PPCISD::FNMSUB: return "PPCISD::FNMSUB"; in getTargetNodeName()
10873 return DAG.getNode(PPCISD::FNMSUB, dl, VT, Op.getOperand(1), in LowerINTRINSIC_WO_CHAIN()
15605 case PPCISD::FNMSUB: in PerformDAGCombine()
17422 return PPCISD::FNMSUB; in invertFMAOpcode()
17423 case PPCISD::FNMSUB: in invertFMAOpcode()
17440 case PPCISD::FNMSUB: in getNegatedExpression()
H A DPPCInstrInfo.td248 def PPCfnmsub : SDNode<"PPCISD::FNMSUB" , SDTFPTernaryOp>;
3006 defm FNMSUB : AForm_1r<63, 30,
3404 (FNMSUB $A, $B, $C)>;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.cpp1827 : MachineCombinerPattern::FNMSUB); in getFPFusedMultiplyPatterns()
1881 case MachineCombinerPattern::FNMSUB: in getAddendOperandIdx()
1946 case MachineCombinerPattern::FNMSUB: { in genAlternativeCodeSequence()
2670 case CASE_VFMA_SPLATS(FNMSUB): in findCommutedOpIndices()
2700 case CASE_VFMA_OPCODE_LMULS_MF4(FNMSUB, VV): in findCommutedOpIndices()
2835 case CASE_VFMA_SPLATS(FNMSUB): in commuteInstructionImpl()
2860 CASE_VFMA_CHANGE_OPCODE_SPLATS(FNMSAC, FNMSUB) in commuteInstructionImpl()
2861 CASE_VFMA_CHANGE_OPCODE_SPLATS(FNMSUB, FNMSAC) in commuteInstructionImpl()
2865 CASE_VFMA_CHANGE_OPCODE_LMULS_MF4(FNMSAC, FNMSUB, VV) in commuteInstructionImpl()
2882 case CASE_VFMA_OPCODE_LMULS_MF4(FNMSUB, VV): in commuteInstructionImpl()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineCombiner.cpp319 case MachineCombinerPattern::FNMSUB: in getCombinerObjective()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.h554 FNMSUB, enumerator
H A DX86InstrFragmentsSIMD.td550 def X86Fnmsub : SDNode<"X86ISD::FNMSUB", SDTFPTernaryOp, [SDNPCommutative]>;
H A DX86ISelLowering.cpp33365 NODE_NAME_CASE(FNMSUB) in getTargetNodeName()
51530 case X86ISD::FMSUB: Opcode = X86ISD::FNMSUB; break; in negateFMAOpcode()
51536 case X86ISD::FNMSUB: Opcode = X86ISD::FMSUB; break; in negateFMAOpcode()
51551 case X86ISD::FNMADD: Opcode = X86ISD::FNMSUB; break; in negateFMAOpcode()
51554 case X86ISD::FNMSUB: Opcode = X86ISD::FNMADD; break; in negateFMAOpcode()
51568 case ISD::FMA: Opcode = X86ISD::FNMSUB; break; in negateFMAOpcode()
51574 case X86ISD::FNMSUB: Opcode = ISD::FMA; break; in negateFMAOpcode()
51606 SDValue NewNode = DAG.getNode(X86ISD::FNMSUB, DL, VT, Arg.getOperand(0), in combineFneg()
51639 case X86ISD::FNMSUB: in getNegatedExpression()
56306 case X86ISD::FNMSUB: in PerformDAGCombine()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedThunderX2T99.td1184 (instregex "^FMADD", "^FMSUB", "^FNMADD", "^FNMSUB")>;
H A DAArch64SchedThunderX3T110.td1292 (instregex "^FMADD", "^FMSUB", "^FNMADD", "^FNMSUB")>;
H A DAArch64InstrInfo.td4750 defm FNMSUB : ThreeOperandFPData<1, 1, "fnmsub",