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Searched refs:FMINNUM_IEEE (Results 1 – 16 of 16) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h976 FMINNUM_IEEE, enumerator
H A DTargetLowering.h2791 case ISD::FMINNUM_IEEE: in isCommutativeBinOp()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp194 case ISD::FMINNUM_IEEE: return "fminnum_ieee"; in getOperationName()
H A DLegalizeVectorOps.cpp387 case ISD::FMINNUM_IEEE: in LegalizeOp()
H A DDAGCombiner.cpp6107 ? ISD::FMINNUM_IEEE in getMinMaxOpcodeForFP()
6133 ? ISD::FMINNUM_IEEE in getMinMaxOpcodeForFP()
6189 TLI.isOperationLegal(ISD::FMINNUM_IEEE, OpVT); in foldAndOrOfSETCC()
11190 unsigned IEEEOpcode = (LHS == True) ? ISD::FMINNUM_IEEE : ISD::FMAXNUM_IEEE; in combineMinNumMaxNumImpl()
11205 unsigned IEEEOpcode = (LHS == True) ? ISD::FMAXNUM_IEEE : ISD::FMINNUM_IEEE; in combineMinNumMaxNumImpl()
H A DLegalizeVectorTypes.cpp130 case ISD::FMINNUM_IEEE: in ScalarizeVectorResult()
H A DSelectionDAG.cpp5187 case ISD::FMINNUM_IEEE: in isKnownNeverNaN()
H A DTargetLowering.cpp8281 ISD::FMINNUM_IEEE : ISD::FMAXNUM_IEEE; in expandFMINNUM_FMAXNUM()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/Target/
H A DGenericOpcodes.td798 // FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimum or maximum on
817 // as less than 0.0. While FMINNUM_IEEE/FMAXNUM_IEEE follow IEEE 754-2008
H A DTargetSelectionDAG.td498 def fminnum_ieee : SDNode<"ISD::FMINNUM_IEEE", SDTFPBinOp,
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp524 setOperationAction({ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE}, in SITargetLowering()
755 setOperationAction({ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE}, in SITargetLowering()
779 setOperationAction({ISD::FADD, ISD::FMUL, ISD::FMA, ISD::FMINNUM_IEEE, in SITargetLowering()
891 ISD::FMINNUM_IEEE, in SITargetLowering()
5623 case ISD::FMINNUM_IEEE: in LowerOperation()
12398 case ISD::FMINNUM_IEEE: in isCanonicalized()
12757 case ISD::FMINNUM_IEEE: in minMaxOpcToMin3Max3Opc()
13120 case ISD::FMINNUM_IEEE: in performExtractVectorEltCombine()
13279 SDValue A1 = DAG.getNode(ISD::FMINNUM_IEEE, SL, VT, A, B); in performFPRoundCombine()
13282 return DAG.getNode(ISD::FMINNUM_IEEE, SL, VT, B1, C1); in performFPRoundCombine()
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H A DAMDGPUISelLowering.cpp608 case ISD::FMINNUM_IEEE: in fnegFoldsIntoOpcode()
4654 return ISD::FMINNUM_IEEE; in inverseMinMax()
4655 case ISD::FMINNUM_IEEE: in inverseMinMax()
4783 case ISD::FMINNUM_IEEE: in performFNegCombine()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp832 ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE, in initActions()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp176 setOperationAction(ISD::FMINNUM_IEEE, MVT::f32, Legal); in LoongArchTargetLowering()
211 setOperationAction(ISD::FMINNUM_IEEE, MVT::f64, Legal); in LoongArchTargetLowering()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp761 setOperationAction(ISD::FMINNUM_IEEE, MVT::f64, Legal); in PPCTargetLowering()
762 setOperationAction(ISD::FMINNUM_IEEE, MVT::f32, Legal); in PPCTargetLowering()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp43914 case ISD::FMINNUM_IEEE: in scalarizeExtEltFP()