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Searched refs:FMAXNUM_IEEE (Results 1 – 16 of 16) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h977 FMAXNUM_IEEE, enumerator
H A DTargetLowering.h2792 case ISD::FMAXNUM_IEEE: in isCommutativeBinOp()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp195 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee"; in getOperationName()
H A DLegalizeVectorOps.cpp388 case ISD::FMAXNUM_IEEE: in LegalizeOp()
H A DDAGCombiner.cpp6115 ? ISD::FMAXNUM_IEEE in getMinMaxOpcodeForFP()
6142 ? ISD::FMAXNUM_IEEE in getMinMaxOpcodeForFP()
6188 bool isFMAXNUMFMINNUM_IEEE = TLI.isOperationLegal(ISD::FMAXNUM_IEEE, OpVT) && in foldAndOrOfSETCC()
11190 unsigned IEEEOpcode = (LHS == True) ? ISD::FMINNUM_IEEE : ISD::FMAXNUM_IEEE; in combineMinNumMaxNumImpl()
11205 unsigned IEEEOpcode = (LHS == True) ? ISD::FMAXNUM_IEEE : ISD::FMINNUM_IEEE; in combineMinNumMaxNumImpl()
H A DLegalizeVectorTypes.cpp131 case ISD::FMAXNUM_IEEE: in ScalarizeVectorResult()
H A DSelectionDAG.cpp5188 case ISD::FMAXNUM_IEEE: { in isKnownNeverNaN()
H A DTargetLowering.cpp8281 ISD::FMINNUM_IEEE : ISD::FMAXNUM_IEEE; in expandFMINNUM_FMAXNUM()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/Target/
H A DGenericOpcodes.td798 // FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimum or maximum on
817 // as less than 0.0. While FMINNUM_IEEE/FMAXNUM_IEEE follow IEEE 754-2008
H A DTargetSelectionDAG.td500 def fmaxnum_ieee : SDNode<"ISD::FMAXNUM_IEEE", SDTFPBinOp,
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp524 setOperationAction({ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE}, in SITargetLowering()
755 setOperationAction({ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE}, in SITargetLowering()
780 ISD::FMAXNUM_IEEE, ISD::FCANONICALIZE}, in SITargetLowering()
892 ISD::FMAXNUM_IEEE, in SITargetLowering()
5624 case ISD::FMAXNUM_IEEE: in LowerOperation()
12399 case ISD::FMAXNUM_IEEE: in isCanonicalized()
12748 case ISD::FMAXNUM_IEEE: in minMaxOpcToMin3Max3Opc()
13119 case ISD::FMAXNUM_IEEE: in performExtractVectorEltCombine()
13280 SDValue B1 = DAG.getNode(ISD::FMAXNUM_IEEE, SL, VT, A, B); in performFPRoundCombine()
13281 SDValue C1 = DAG.getNode(ISD::FMAXNUM_IEEE, SL, VT, A1, C); in performFPRoundCombine()
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H A DAMDGPUISelLowering.cpp609 case ISD::FMAXNUM_IEEE: in fnegFoldsIntoOpcode()
4653 case ISD::FMAXNUM_IEEE: in inverseMinMax()
4656 return ISD::FMAXNUM_IEEE; in inverseMinMax()
4782 case ISD::FMAXNUM_IEEE: in performFNegCombine()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp832 ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE, in initActions()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp177 setOperationAction(ISD::FMAXNUM_IEEE, MVT::f32, Legal); in LoongArchTargetLowering()
212 setOperationAction(ISD::FMAXNUM_IEEE, MVT::f64, Legal); in LoongArchTargetLowering()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp759 setOperationAction(ISD::FMAXNUM_IEEE, MVT::f64, Legal); in PPCTargetLowering()
760 setOperationAction(ISD::FMAXNUM_IEEE, MVT::f32, Legal); in PPCTargetLowering()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp43915 case ISD::FMAXNUM_IEEE: in scalarizeExtEltFP()