Home
last modified time | relevance | path

Searched refs:FIELD_PREP (Results 1 – 25 of 107) sorted by relevance

12345

/freebsd-14.2/sys/dev/irdma/
H A Dirdma_uda.c64 qw1 = FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_PDINDEXLO, info->pd_idx) | in irdma_sc_access_ah()
65 FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_TC, info->tc_tos) | in irdma_sc_access_ah()
66 FIELD_PREP(IRDMA_UDAQPC_VLANTAG, info->vlan_tag); in irdma_sc_access_ah()
69 FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_FLOWLABEL, info->flow_label) | in irdma_sc_access_ah()
70 FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_HOPLIMIT, info->hop_ttl) | in irdma_sc_access_ah()
103 FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_OPCODE, op) | in irdma_sc_access_ah()
106 FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_AVIDX, info->ah_idx) | in irdma_sc_access_ah()
136 FIELD_PREP(IRDMA_UDA_MGCTX_QPID, entry_info->qp_id)); in irdma_create_mg_ctx()
171 FIELD_PREP(IRDMA_UDA_CQPSQ_MG_VLANID, info->vlan_id) | in irdma_access_mcast_grp()
193 FIELD_PREP(IRDMA_UDA_CQPSQ_MG_OPCODE, op) | in irdma_access_mcast_grp()
[all …]
H A Dirdma_ctrl.c408 FIELD_PREP(IRDMA_CQPSQ_QHASH_OPCODE, in irdma_sc_manage_qhash_table_entry()
746 FIELD_PREP(IRDMAQPC_TTL, udp->ttl) | FIELD_PREP(IRDMAQPC_TOS, udp->tos) | in irdma_sc_qp_setctx_roce()
788 FIELD_PREP(IRDMAQPC_MACADDRESS, in irdma_sc_qp_setctx_roce()
840 hdr = FIELD_PREP(IRDMA_CQPSQ_OPCODE, in irdma_sc_alloc_local_mac_entry()
878 FIELD_PREP(IRDMA_CQPSQ_OPCODE, in irdma_sc_add_local_mac_entry()
914 FIELD_PREP(IRDMA_CQPSQ_OPCODE, in irdma_sc_del_local_mac_entry()
1008 mac = FIELD_PREP(IRDMAQPC_MACADDRESS, in irdma_sc_qp_setctx()
1033 FIELD_PREP(IRDMAQPC_INSERTVLANTAG, in irdma_sc_qp_setctx()
1068 FIELD_PREP(IRDMAQPC_IGNORE_TCP_OPT, in irdma_sc_qp_setctx()
3572 FIELD_PREP(IRDMA_CQPSQ_OPCODE, in irdma_sc_manage_hmc_pm_func_table()
[all …]
H A Dirdma_uk.c53 FIELD_PREP(IRDMAQPSQ_FRAG_TO, sge->addr)); in irdma_set_fragment()
55 FIELD_PREP(IRDMAQPSQ_VALID, valid) | in irdma_set_fragment()
61 FIELD_PREP(IRDMAQPSQ_VALID, valid)); in irdma_set_fragment()
94 FIELD_PREP(IRDMAQPSQ_SIGCOMPL, false) | in irdma_nop_hdr()
481 FIELD_PREP(IRDMAQPSQ_OPCODE, in irdma_uk_rdma_read()
484 FIELD_PREP(IRDMAQPSQ_READFENCE, in irdma_uk_rdma_read()
574 FIELD_PREP(IRDMAQPSQ_IMMDATAFLAG, in irdma_uk_send()
584 FIELD_PREP(IRDMAQPSQ_L4LEN, info->l4len) | in irdma_uk_send()
764 FIELD_PREP(IRDMAQPSQ_INLINEDATAFLAG, 1) | in irdma_uk_inline_rdma_write()
835 FIELD_PREP(IRDMAQPSQ_IMMDATAFLAG, in irdma_uk_inline_send()
[all …]
H A Dirdma_puda.c493 FIELD_PREP(IRDMA_UDA_QPSQ_L4LEN, l4len) | in irdma_puda_send()
494 FIELD_PREP(IRDMAQPSQ_AHID, info->ah_id) | in irdma_puda_send()
495 FIELD_PREP(IRDMA_UDA_QPSQ_SIGCOMPL, 1) | in irdma_puda_send()
496 FIELD_PREP(IRDMA_UDA_QPSQ_VALID, in irdma_puda_send()
507 FIELD_PREP(IRDMA_UDA_QPSQ_IPLEN, iplen) | in irdma_puda_send()
508 FIELD_PREP(IRDMA_UDA_QPSQ_L4T, 1) | in irdma_puda_send()
509 FIELD_PREP(IRDMA_UDA_QPSQ_IIPT, iipt) | in irdma_puda_send()
513 FIELD_PREP(IRDMA_UDA_QPSQ_SIGCOMPL, 1) | in irdma_puda_send()
626 FIELD_PREP(IRDMAQPC_PRIVEN, 1) | in irdma_puda_qp_setctx()
1233 offset8 |= FIELD_PREP(IRDMAQPSQ_VALID, 1); in irdma_ilq_putback_rcvbuf()
[all …]
/freebsd-14.2/sys/contrib/dev/athk/ath11k/
H A Dhal_tx.c43 FIELD_PREP(BUFFER_ADDR_INFO0_ADDR, ti->paddr); in ath11k_hal_tx_cmd_desc_setup()
45 FIELD_PREP(BUFFER_ADDR_INFO1_ADDR, in ath11k_hal_tx_cmd_desc_setup()
54 FIELD_PREP(HAL_TCL_DATA_CMD_INFO0_ENCRYPT_TYPE, in ath11k_hal_tx_cmd_desc_setup()
56 FIELD_PREP(HAL_TCL_DATA_CMD_INFO0_SEARCH_TYPE, in ath11k_hal_tx_cmd_desc_setup()
58 FIELD_PREP(HAL_TCL_DATA_CMD_INFO0_ADDR_EN, in ath11k_hal_tx_cmd_desc_setup()
60 FIELD_PREP(HAL_TCL_DATA_CMD_INFO0_CMD_NUM, in ath11k_hal_tx_cmd_desc_setup()
108 FIELD_PREP(HAL_TCL1_RING_FIELD_DSCP_TID_MAP1, in ath11k_hal_tx_set_dscp_tid_map()
110 FIELD_PREP(HAL_TCL1_RING_FIELD_DSCP_TID_MAP2, in ath11k_hal_tx_set_dscp_tid_map()
112 FIELD_PREP(HAL_TCL1_RING_FIELD_DSCP_TID_MAP3, in ath11k_hal_tx_set_dscp_tid_map()
114 FIELD_PREP(HAL_TCL1_RING_FIELD_DSCP_TID_MAP4, in ath11k_hal_tx_set_dscp_tid_map()
[all …]
H A Dhal_rx.c29 FIELD_PREP(HAL_TLV_HDR_LEN, sizeof(*desc)); in ath11k_hal_reo_cmd_queue_stats()
61 FIELD_PREP(HAL_TLV_HDR_LEN, sizeof(*desc)); in ath11k_hal_reo_cmd_flush_cache()
99 FIELD_PREP(HAL_TLV_HDR_LEN, sizeof(*desc)); in ath11k_hal_reo_cmd_update_rx_queue()
122 FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO0_UPD_AC, in ath11k_hal_reo_cmd_update_rx_queue()
154 FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO0_UPD_PN, in ath11k_hal_reo_cmd_update_rx_queue()
160 FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO1_VLD, in ath11k_hal_reo_cmd_update_rx_queue()
168 FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO1_AC, in ath11k_hal_reo_cmd_update_rx_queue()
170 FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO1_BAR, in ath11k_hal_reo_cmd_update_rx_queue()
174 FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO1_RETRY, in ath11k_hal_reo_cmd_update_rx_queue()
206 FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO2_SVLD, in ath11k_hal_reo_cmd_update_rx_queue()
[all …]
H A Dwmi.c1046 FIELD_PREP(WMI_TLV_LEN, in ath11k_wmi_vdev_start()
2775 FIELD_PREP(WMI_TLV_TAG, in ath11k_wmi_send_wmm_update_cmd_tlv()
2777 FIELD_PREP(WMI_TLV_LEN, in ath11k_wmi_send_wmm_update_cmd_tlv()
2820 FIELD_PREP(WMI_TLV_TAG, in ath11k_wmi_send_dfs_phyerr_offload_enable_cmd()
3057 FIELD_PREP(WMI_TLV_TAG, in ath11k_wmi_send_init_country_cmd()
3713 FIELD_PREP(WMI_TLV_TAG, in ath11k_wmi_pdev_set_srg_patial_bssid_bitmap()
3752 FIELD_PREP(WMI_TLV_TAG, in ath11k_wmi_pdev_srg_obss_color_enable_bitmap()
3791 FIELD_PREP(WMI_TLV_TAG, in ath11k_wmi_pdev_srg_obss_bssid_enable_bitmap()
3830 FIELD_PREP(WMI_TLV_TAG, in ath11k_wmi_pdev_non_srg_obss_color_enable_bitmap()
3869 FIELD_PREP(WMI_TLV_TAG, in ath11k_wmi_pdev_non_srg_obss_bssid_enable_bitmap()
[all …]
H A Dhal.c394 FIELD_PREP(HAL_TCL1_RING_BASE_MSB_RING_SIZE, in ath11k_hal_srng_src_hw_init()
873 link_addr->info1 = FIELD_PREP( in ath11k_hal_setup_link_idle_list()
876 FIELD_PREP( in ath11k_hal_setup_link_idle_list()
900 FIELD_PREP(BUFFER_ADDR_INFO0_ADDR, in ath11k_hal_setup_link_idle_list()
905 FIELD_PREP( in ath11k_hal_setup_link_idle_list()
908 FIELD_PREP( in ath11k_hal_setup_link_idle_list()
916 FIELD_PREP(BUFFER_ADDR_INFO0_ADDR, in ath11k_hal_setup_link_idle_list()
921 FIELD_PREP( in ath11k_hal_setup_link_idle_list()
930 FIELD_PREP(BUFFER_ADDR_INFO0_ADDR, in ath11k_hal_setup_link_idle_list()
936 FIELD_PREP(BUFFER_ADDR_INFO0_ADDR, in ath11k_hal_setup_link_idle_list()
[all …]
H A Ddp_tx.c148 FIELD_PREP(DP_TX_DESC_ID_MSDU_ID, ret) | in ath11k_dp_tx()
149 FIELD_PREP(DP_TX_DESC_ID_POOL_ID, pool_id); in ath11k_dp_tx()
156 ti.flags0 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TO_FW, 1); in ath11k_dp_tx()
188 FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TCP6_CKSUM_EN, 1); in ath11k_dp_tx()
948 cmd->info1 |= FIELD_PREP( in ath11k_dp_tx_htt_srng_setup()
951 cmd->info1 |= FIELD_PREP( in ath11k_dp_tx_htt_srng_setup()
969 cmd->intr_info = FIELD_PREP( in ath11k_dp_tx_htt_srng_setup()
972 cmd->intr_info |= FIELD_PREP( in ath11k_dp_tx_htt_srng_setup()
978 cmd->info2 = FIELD_PREP( in ath11k_dp_tx_htt_srng_setup()
1018 cmd->ver_reg_info = FIELD_PREP(HTT_VER_REQ_INFO_MSG_ID, in ath11k_dp_tx_htt_h2t_ver_req_msg()
[all …]
/freebsd-14.2/sys/contrib/dev/mediatek/mt76/mt76x2/
H A Dusb_phy.c64 [0] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 0) | in mt76x2u_phy_set_channel()
65 FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 1) | in mt76x2u_phy_set_channel()
66 FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 2) | in mt76x2u_phy_set_channel()
67 FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 3) | in mt76x2u_phy_set_channel()
69 [1] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 1) | in mt76x2u_phy_set_channel()
70 FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 0) | in mt76x2u_phy_set_channel()
71 FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 2) | in mt76x2u_phy_set_channel()
72 FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 3) | in mt76x2u_phy_set_channel()
74 [2] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 2) | in mt76x2u_phy_set_channel()
75 FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 3) | in mt76x2u_phy_set_channel()
[all …]
H A Dinit.c86 (FIELD_PREP(MT_PROT_CFG_RATE, 0x3) | \ in mt76_write_mac_initvals()
87 FIELD_PREP(MT_PROT_CFG_NAV, 1) | \ in mt76_write_mac_initvals()
92 (FIELD_PREP(MT_PROT_CFG_RATE, 0x2004) | \ in mt76_write_mac_initvals()
93 FIELD_PREP(MT_PROT_CFG_NAV, 1) | \ in mt76_write_mac_initvals()
98 (FIELD_PREP(MT_PROT_CFG_RATE, 0x2004) | \ in mt76_write_mac_initvals()
99 FIELD_PREP(MT_PROT_CFG_CTRL, 1) | \ in mt76_write_mac_initvals()
100 FIELD_PREP(MT_PROT_CFG_NAV, 1) | \ in mt76_write_mac_initvals()
101 FIELD_PREP(MT_PROT_CFG_TXOP_ALLOW, 0x17)) in mt76_write_mac_initvals()
104 (FIELD_PREP(MT_PROT_CFG_RATE, 0x2084) | \ in mt76_write_mac_initvals()
105 FIELD_PREP(MT_PROT_CFG_CTRL, 1) | \ in mt76_write_mac_initvals()
[all …]
H A Dpci_phy.c126 [0] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 0) | in mt76x2_phy_set_channel()
127 FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 1) | in mt76x2_phy_set_channel()
128 FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 2) | in mt76x2_phy_set_channel()
129 FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 3) | in mt76x2_phy_set_channel()
131 [1] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 1) | in mt76x2_phy_set_channel()
132 FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 0) | in mt76x2_phy_set_channel()
133 FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 2) | in mt76x2_phy_set_channel()
134 FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 3) | in mt76x2_phy_set_channel()
136 [2] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 2) | in mt76x2_phy_set_channel()
137 FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 3) | in mt76x2_phy_set_channel()
[all …]
/freebsd-14.2/sys/contrib/dev/mediatek/mt76/mt7603/
H A Dinit.c60 FIELD_PREP(MT_PSE_FRP_P0, 7) | in mt7603_dma_sched_init()
61 FIELD_PREP(MT_PSE_FRP_P1, 6) | in mt7603_dma_sched_init()
62 FIELD_PREP(MT_PSE_FRP_P2_RQ2, 4)); in mt7603_dma_sched_init()
152 FIELD_PREP(MT_AGG_LIMIT_AC(0), 24) | in mt7603_mac_init()
153 FIELD_PREP(MT_AGG_LIMIT_AC(1), 24) | in mt7603_mac_init()
154 FIELD_PREP(MT_AGG_LIMIT_AC(2), 24) | in mt7603_mac_init()
155 FIELD_PREP(MT_AGG_LIMIT_AC(3), 24)); in mt7603_mac_init()
158 FIELD_PREP(MT_AGG_LIMIT_AC(0), 24) | in mt7603_mac_init()
159 FIELD_PREP(MT_AGG_LIMIT_AC(1), 24) | in mt7603_mac_init()
160 FIELD_PREP(MT_AGG_LIMIT_AC(2), 24) | in mt7603_mac_init()
[all …]
H A Dmac.c48 FIELD_PREP(MT_TIMEOUT_VAL_CCA, 48); in mt7603_mac_set_timing()
50 FIELD_PREP(MT_TIMEOUT_VAL_CCA, 24); in mt7603_mac_set_timing()
70 FIELD_PREP(MT_IFS_EIFS, 360) | in mt7603_mac_set_timing()
71 FIELD_PREP(MT_IFS_RIFS, 2) | in mt7603_mac_set_timing()
72 FIELD_PREP(MT_IFS_SIFS, sifs) | in mt7603_mac_set_timing()
133 w0 = FIELD_PREP(MT_WTBL1_W0_ADDR_HI, in mt7603_wtbl_init()
135 w1 = FIELD_PREP(MT_WTBL1_W1_ADDR_LO, in mt7603_wtbl_init()
197 FIELD_PREP(MT_TX_ABORT_WCID, idx)); in mt7603_filter_tx()
250 FIELD_PREP(MT_PSE_RTA_TAG_ID, idx) | in mt7603_wtbl_set_ps()
251 FIELD_PREP(MT_PSE_RTA_PORT_ID, 0) | in mt7603_wtbl_set_ps()
[all …]
H A Dbeacon.c32 FIELD_PREP(MT_DMA_FQCR0_TARGET_WCID, mvif->sta.wcid.idx) | in mt7603_update_beacon_iter()
33 FIELD_PREP(MT_DMA_FQCR0_TARGET_QID, in mt7603_update_beacon_iter()
35 FIELD_PREP(MT_DMA_FQCR0_DEST_PORT_ID, 3) | in mt7603_update_beacon_iter()
36 FIELD_PREP(MT_DMA_FQCR0_DEST_QUEUE_ID, 8)); in mt7603_update_beacon_iter()
167 FIELD_PREP(MT_TBTT_PERIOD, intval) | MT_TBTT_CAL_ENABLE); in mt7603_beacon_set_timer()
/freebsd-14.2/contrib/ofed/libirdma/
H A Dirdma_uk.c53 FIELD_PREP(IRDMAQPSQ_FRAG_TO, sge->addr)); in irdma_set_fragment()
55 FIELD_PREP(IRDMAQPSQ_VALID, valid) | in irdma_set_fragment()
61 FIELD_PREP(IRDMAQPSQ_VALID, valid)); in irdma_set_fragment()
94 FIELD_PREP(IRDMAQPSQ_SIGCOMPL, false) | in irdma_nop_hdr()
481 FIELD_PREP(IRDMAQPSQ_OPCODE, in irdma_uk_rdma_read()
484 FIELD_PREP(IRDMAQPSQ_READFENCE, in irdma_uk_rdma_read()
574 FIELD_PREP(IRDMAQPSQ_IMMDATAFLAG, in irdma_uk_send()
867 FIELD_PREP(IRDMAQPSQ_IMMDATAFLAG, in irdma_uk_inline_send()
976 FIELD_PREP(IRDMAQPSQ_STAGRIGHTS, in irdma_uk_mw_bind()
978 FIELD_PREP(IRDMAQPSQ_VABASEDTO, in irdma_uk_mw_bind()
[all …]
/freebsd-14.2/sys/contrib/dev/mediatek/mt76/mt7615/
H A Dusb_sdio.c83 w5 |= FIELD_PREP(MT_WTBL_W5_BW_CAP, rate->bw) | in mt7663_usb_sdio_set_rates()
84 FIELD_PREP(MT_WTBL_W5_CHANGE_BW_RATE, in mt7663_usb_sdio_set_rates()
91 FIELD_PREP(MT_WTBL_RIUCR1_RATE1, rate->val[0]) | in mt7663_usb_sdio_set_rates()
96 FIELD_PREP(MT_WTBL_RIUCR2_RATE3, rate->val[1]) | in mt7663_usb_sdio_set_rates()
97 FIELD_PREP(MT_WTBL_RIUCR2_RATE4, rate->val[2]) | in mt7663_usb_sdio_set_rates()
232 FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PLE, 1) | in mt7663u_dma_sched_init()
233 FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PSE, 8)); in mt7663u_dma_sched_init()
259 FIELD_PREP(MT_WL_TX_TMOUT_LMT, 80000) | in mt7663u_dma_sched_init()
260 FIELD_PREP(MT_WL_RX_AGG_PKT_LMT, 1)); in mt7663u_dma_sched_init()
272 FIELD_PREP(MT_WL_RX_AGG_LMT, 32) | in mt7663u_dma_sched_init()
[all …]
H A Dinit.c93 FIELD_PREP(MT_TMAC_TRCR_CCA_SEL, 2) | in mt7615_init_mac_chain()
94 FIELD_PREP(MT_TMAC_TRCR_SEC_CCA_SEL, 0)); in mt7615_init_mac_chain()
102 FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), 7) | in mt7615_init_mac_chain()
103 FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), 2) | in mt7615_init_mac_chain()
104 FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), 2) | in mt7615_init_mac_chain()
105 FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), 2) | in mt7615_init_mac_chain()
106 FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), 1) | in mt7615_init_mac_chain()
107 FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), 1) | in mt7615_init_mac_chain()
108 FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), 1) | in mt7615_init_mac_chain()
109 FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), 1)); in mt7615_init_mac_chain()
[all …]
H A Ddma.c149 FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PLE, 1) | in mt7622_dma_sched_init()
150 FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PSE, 8)); in mt7622_dma_sched_init()
154 FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MIN, 0x10) | in mt7622_dma_sched_init()
155 FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MAX, 0x800)); in mt7622_dma_sched_init()
172 FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PLE, 1) | in mt7663_dma_sched_init()
173 FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PSE, 8)); in mt7663_dma_sched_init()
183 FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MIN, 0x40) | in mt7663_dma_sched_init()
186 FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MIN, 0x40) | in mt7663_dma_sched_init()
187 FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MAX, 0x40)); in mt7663_dma_sched_init()
189 FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MIN, 0x20) | in mt7663_dma_sched_init()
[all …]
H A Dmac.c147 FIELD_PREP(MT_TIMEOUT_VAL_CCA, 48); in mt7615_mac_set_timing()
149 FIELD_PREP(MT_TIMEOUT_VAL_CCA, 28); in mt7615_mac_set_timing()
184 FIELD_PREP(MT_IFS_EIFS, 360) | in mt7615_mac_set_timing()
185 FIELD_PREP(MT_IFS_RIFS, 2) | in mt7615_mac_set_timing()
186 FIELD_PREP(MT_IFS_SIFS, sifs) | in mt7615_mac_set_timing()
187 FIELD_PREP(MT_IFS_SLOT, phy->slottime)); in mt7615_mac_set_timing()
713 FIELD_PREP(MT_TX_RATE_MODE, phy) | in mt7615_mac_tx_rate_val()
772 FIELD_PREP(MT_TXD0_Q_IDX, q_idx); in mt7615_mac_write_txwi()
778 FIELD_PREP(MT_TXD1_HDR_INFO, in mt7615_mac_write_txwi()
780 FIELD_PREP(MT_TXD1_TID, in mt7615_mac_write_txwi()
[all …]
/freebsd-14.2/sys/contrib/dev/mediatek/mt76/
H A Dmt76_connac_mac.c350 return FIELD_PREP(MT_TX_RATE_NSS, nss) | in mt76_connac2_mac_tx_rate_val()
352 FIELD_PREP(MT_TX_RATE_MODE, mode); in mt76_connac2_mac_tx_rate_val()
374 FIELD_PREP(MT_TXD1_TID, tid); in mt76_connac2_mac_write_txwi_8023()
390 val = FIELD_PREP(MT_TXD7_TYPE, fc_type) | in mt76_connac2_mac_write_txwi_8023()
425 FIELD_PREP(MT_TXD1_HDR_INFO, in mt76_connac2_mac_write_txwi_80211()
427 FIELD_PREP(MT_TXD1_TID, tid); in mt76_connac2_mac_write_txwi_80211()
472 val = FIELD_PREP(MT_TXD7_TYPE, fc_type) | in mt76_connac2_mac_write_txwi_80211()
531 FIELD_PREP(MT_TXD0_PKT_FMT, p_fmt) | in mt76_connac2_mac_write_txwi()
532 FIELD_PREP(MT_TXD0_Q_IDX, q_idx); in mt76_connac2_mac_write_txwi()
557 val = FIELD_PREP(MT_TXD5_PID, pid); in mt76_connac2_mac_write_txwi()
[all …]
H A Dmt792x_mac.c43 u32 cck = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 231) | in mt792x_mac_set_timeing()
44 FIELD_PREP(MT_TIMEOUT_VAL_CCA, 48); in mt792x_mac_set_timeing()
45 u32 ofdm = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 60) | in mt792x_mac_set_timeing()
46 FIELD_PREP(MT_TIMEOUT_VAL_CCA, 28); in mt792x_mac_set_timeing()
58 reg_offset = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, offset) | in mt792x_mac_set_timeing()
59 FIELD_PREP(MT_TIMEOUT_VAL_CCA, offset); in mt792x_mac_set_timeing()
64 FIELD_PREP(MT_IFS_EIFS, 360) | in mt792x_mac_set_timeing()
65 FIELD_PREP(MT_IFS_RIFS, 2) | in mt792x_mac_set_timeing()
66 FIELD_PREP(MT_IFS_SIFS, sifs) | in mt792x_mac_set_timeing()
67 FIELD_PREP(MT_IFS_SLOT, phy->slottime)); in mt792x_mac_set_timeing()
[all …]
/freebsd-14.2/sys/dev/qat/qat_common/
H A Dadf_pfvf_vf_proto.c15 #define FIELD_PREP(_mask, _val) \ macro
129 blk_type = FIELD_PREP(ADF_VF2PF_SMALL_BLOCK_TYPE_MASK, *type); in adf_vf2pf_blkmsg_data_req()
130 blk_byte = FIELD_PREP(ADF_VF2PF_SMALL_BLOCK_BYTE_MASK, *data); in adf_vf2pf_blkmsg_data_req()
134 blk_type = FIELD_PREP(ADF_VF2PF_MEDIUM_BLOCK_TYPE_MASK, in adf_vf2pf_blkmsg_data_req()
136 blk_byte = FIELD_PREP(ADF_VF2PF_MEDIUM_BLOCK_BYTE_MASK, *data); in adf_vf2pf_blkmsg_data_req()
140 blk_type = FIELD_PREP(ADF_VF2PF_LARGE_BLOCK_TYPE_MASK, in adf_vf2pf_blkmsg_data_req()
142 blk_byte = FIELD_PREP(ADF_VF2PF_LARGE_BLOCK_BYTE_MASK, *data); in adf_vf2pf_blkmsg_data_req()
164 blk_type | blk_byte | FIELD_PREP(ADF_VF2PF_BLOCK_CRC_REQ_MASK, crc); in adf_vf2pf_blkmsg_data_req()
/freebsd-14.2/sys/contrib/dev/mediatek/mt76/mt7915/
H A Dsoc.c124 val = FIELD_PREP(MT_ADIE_EFUSE_MODE_MASK, 0) | in mt7986_wmac_adie_efuse_read()
125 FIELD_PREP(MT_ADIE_EFUSE_ADDR_MASK, addr) | in mt7986_wmac_adie_efuse_read()
126 FIELD_PREP(MT_ADIE_EFUSE_KICK_MASK, 1); in mt7986_wmac_adie_efuse_read()
404 FIELD_PREP(MT_ADIE_PGA_GAIN_MASK, val)); in mt7986_wmac_adie_thermal_cal()
416 FIELD_PREP(MT_ADIE_LDO_CTRL_MASK, val)); in mt7986_wmac_adie_thermal_cal()
478 mode = FIELD_PREP(GENMASK(6, 4), val); in mt7986_wmac_adie_xtal_trim_7976()
482 FIELD_PREP(GENMASK(31, 24), trim_80m)); in mt7986_wmac_adie_xtal_trim_7976()
488 FIELD_PREP(GENMASK(31, 24), trim_80m)); in mt7986_wmac_adie_xtal_trim_7976()
492 FIELD_PREP(GENMASK(23, 16), trim_40m)); in mt7986_wmac_adie_xtal_trim_7976()
498 FIELD_PREP(GENMASK(23, 16), trim_40m)); in mt7986_wmac_adie_xtal_trim_7976()
[all …]
H A Dinit.c241 val = FIELD_PREP(MT_LED_STATUS_DURATION, 0xffff) | in mt7915_led_set_config()
242 FIELD_PREP(MT_LED_STATUS_OFF, delay_off) | in mt7915_led_set_config()
243 FIELD_PREP(MT_LED_STATUS_ON, delay_on); in mt7915_led_set_config()
435 FIELD_PREP(IEEE80211_VHT_CAP_EXT_NSS_BW_MASK, 1); in mt7915_init_wiphy()
479 set = FIELD_PREP(MT_MDP_RCFR0_MCU_RX_MGMT, MT_MDP_TO_HIF) | in mt7915_mac_init_band()
510 set = FIELD_PREP(MT_WF_RMAC_MIB_OBSS_BACKOFF, 0) | in mt7915_mac_init_band()
511 FIELD_PREP(MT_WF_RMAC_MIB_ED_OFFSET, 4); in mt7915_mac_init_band()
516 set = FIELD_PREP(MT_WTBLOFF_TOP_RSCR_RCPI_MODE, 0) | in mt7915_mac_init_band()
517 FIELD_PREP(MT_WTBLOFF_TOP_RSCR_RCPI_PARAM, 0x3); in mt7915_mac_init_band()
867 FIELD_PREP(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK, in mt7915_set_stream_vht_txbf_caps()
[all …]

12345