| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | ConstrainedOps.def | 72 DAG_FUNCTION(ceil, 1, 0, experimental_constrained_ceil, FCEIL)
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| H A D | VPIntrinsics.def | 401 VP_PROPERTY_FUNCTIONAL_SDOPC(FCEIL)
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 950 FCEIL, enumerator
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| H A D | BasicTTIImpl.h | 1929 ISD = ISD::FCEIL; in getTypeBasedIntrinsicInstrCost()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 213 case ISD::FCEIL: return "fceil"; in getOperationName()
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| H A D | LegalizeFloatTypes.cpp | 80 case ISD::FCEIL: R = SoftenFloatRes_FCEIL(N); break; in SoftenFloatResult()
1309 case ISD::FCEIL: ExpandFloatRes_FCEIL(N, Lo, Hi); break; in ExpandFloatResult()
2403 case ISD::FCEIL: in PromoteFloatResult()
2811 case ISD::FCEIL: in SoftPromoteHalfResult()
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| H A D | LegalizeVectorOps.cpp | 404 case ISD::FCEIL: in LegalizeOp()
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| H A D | LegalizeVectorTypes.cpp | 87 case ISD::FCEIL: in ScalarizeVectorResult()
1078 case ISD::FCEIL: in SplitVectorResult()
4270 case ISD::FCEIL: in WidenVectorResult()
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| H A D | LegalizeDAG.cpp | 4481 case ISD::FCEIL: in ConvertNodeToLibcall()
5355 case ISD::FCEIL: in PromoteNode()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVTargetTransformInfo.cpp | 748 if (!LT.second.isVector() && TLI->isOperationCustom(ISD::FCEIL, LT.second)) in getIntrinsicInstrCost()
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| H A D | RISCVISelLowering.cpp | 438 ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FRINT, ISD::FROUND, in RISCVTargetLowering()
451 ISD::SETCC, ISD::FCEIL, ISD::FFLOOR, in RISCVTargetLowering()
916 ISD::FABS, ISD::FNEG, ISD::FCOPYSIGN, ISD::FCEIL, in RISCVTargetLowering()
951 setOperationAction({ISD::FTRUNC, ISD::FCEIL, ISD::FFLOOR, ISD::FROUND, in RISCVTargetLowering()
1299 setOperationAction({ISD::FTRUNC, ISD::FCEIL, ISD::FFLOOR, ISD::FROUND, in RISCVTargetLowering()
2848 case ISD::FCEIL: in matchRoundingOp()
2928 case ISD::FCEIL: in lowerVectorFTRUNC_FCEIL_FFLOOR_FROUND()
6352 case ISD::FCEIL: in LowerOperation()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 937 ISD::FCEIL, ISD::FRINT, ISD::FTRUNC, ISD::LROUND, in initActions()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 104 setOperationAction({ISD::FCEIL, ISD::FTRUNC, ISD::FROUNDEVEN, ISD::FFLOOR}, in R600TargetLowering()
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| H A D | AMDGPUISelLowering.cpp | 343 setOperationAction({ISD::FCEIL, ISD::FPOW, ISD::FABS, ISD::FFLOOR, in AMDGPUTargetLowering()
480 ISD::FADD, ISD::FCEIL, ISD::FCOS, in AMDGPUTargetLowering()
1341 case ISD::FCEIL: return LowerFCEIL(Op, DAG); in LowerOperation()
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| H A D | AMDGPUISelDAGToDAG.cpp | 163 case ISD::FCEIL: in fp16SrcZerosHighBits()
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| H A D | SIISelLowering.cpp | 214 ISD::FCEIL, ISD::FTRUNC, ISD::FRINT, ISD::FNEARBYINT, in SITargetLowering()
528 setOperationAction({ISD::FTRUNC, ISD::FCEIL, ISD::FROUNDEVEN}, MVT::f64, in SITargetLowering()
531 setOperationAction({ISD::FCEIL, ISD::FTRUNC, ISD::FROUNDEVEN, ISD::FFLOOR}, in SITargetLowering()
12354 case ISD::FCEIL: in isCanonicalized()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 313 setOperationAction(ISD::FCEIL, MVT::ppcf128, Expand); in PPCTargetLowering()
451 setOperationAction(ISD::FCEIL, MVT::f64, Legal); in PPCTargetLowering()
456 setOperationAction(ISD::FCEIL, MVT::f32, Legal); in PPCTargetLowering()
855 setOperationAction(ISD::FCEIL, VT, Expand); in PPCTargetLowering()
919 setOperationAction(ISD::FCEIL, MVT::v4f32, Legal); in PPCTargetLowering()
1017 setOperationAction(ISD::FCEIL, MVT::v2f64, Legal); in PPCTargetLowering()
1227 setOperationAction(ISD::FCEIL, MVT::f128, Legal); in PPCTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 444 case ISD::FCEIL: in NVPTXTargetLowering()
763 for (const auto &Op : {ISD::FCEIL, ISD::FFLOOR, ISD::FNEARBYINT, ISD::FRINT, in NVPTXTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 1198 case ISD::FCEIL: in PreprocessISelDAG()
1216 case ISD::FCEIL: Imm = 0xA; break; in PreprocessISelDAG()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 129 for (auto Op : {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT, in WebAssemblyTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 700 ISD::FNEG, ISD::FABS, ISD::FCEIL, in AArch64TargetLowering()
738 setOperationAction(ISD::FCEIL, MVT::v4f16, Expand); in AArch64TargetLowering()
745 setOperationAction(ISD::FCEIL, MVT::v8f16, Expand); in AArch64TargetLowering()
768 {ISD::FFLOOR, ISD::FNEARBYINT, ISD::FCEIL, in AArch64TargetLowering()
1083 ISD::FNEG, ISD::FABS, ISD::FCEIL, in AArch64TargetLowering()
1241 {ISD::FFLOOR, ISD::FNEARBYINT, ISD::FCEIL, ISD::FRINT, ISD::FTRUNC, in AArch64TargetLowering()
1469 setOperationAction(ISD::FCEIL, VT, Custom); in AArch64TargetLowering()
1873 setOperationAction(ISD::FCEIL, VT, Custom); in addTypeForFixedLengthSVE()
6177 case ISD::FCEIL: in LowerOperation()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 508 setOperationAction(ISD::FCEIL, VT, Legal); in SystemZTargetLowering()
568 setOperationAction(ISD::FCEIL, MVT::v2f64, Legal); in SystemZTargetLowering()
609 setOperationAction(ISD::FCEIL, MVT::v4f32, Legal); in SystemZTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 519 def fceil : SDNode<"ISD::FCEIL" , SDTFPUnaryOp>;
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 886 setOperationAction(ISD::FCEIL, MVT::v2f64, Expand); in ARMTargetLowering()
907 setOperationAction(ISD::FCEIL, MVT::v4f32, Expand); in ARMTargetLowering()
924 setOperationAction(ISD::FCEIL, MVT::v2f32, Expand); in ARMTargetLowering()
1066 setOperationAction(ISD::FCEIL, MVT::f64, Expand); in ARMTargetLowering()
1511 setOperationAction(ISD::FCEIL, MVT::f32, Legal); in ARMTargetLowering()
1527 setOperationAction(ISD::FCEIL, MVT::f64, Legal); in ARMTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 136 setOperationAction(ISD::FCEIL, MVT::f16, Promote); in MipsSETargetLowering()
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