| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsInstrFPU.td | 264 let Defs = [FCC0]; 863 (!cast<Instruction>("C_F_"#NAME) FCC0, 866 (!cast<Instruction>("C_UN_"#NAME) FCC0, 869 (!cast<Instruction>("C_EQ_"#NAME) FCC0, 872 (!cast<Instruction>("C_UEQ_"#NAME) FCC0, 875 (!cast<Instruction>("C_OLT_"#NAME) FCC0, 878 (!cast<Instruction>("C_ULT_"#NAME) FCC0, 881 (!cast<Instruction>("C_OLE_"#NAME) FCC0, 887 (!cast<Instruction>("C_SF_"#NAME) FCC0, 899 (!cast<Instruction>("C_LT_"#NAME) FCC0, [all …]
|
| H A D | MipsISelLowering.cpp | 663 SDValue FCC0 = DAG.getRegister(Mips::FCC0, MVT::i32); in createCMovFP() local 666 True.getValueType(), True, FCC0, False, Cond); in createCMovFP() 2048 SDValue FCC0 = DAG.getRegister(Mips::FCC0, MVT::i32); in lowerBRCOND() local 2050 FCC0, Dest, CondRes); in lowerBRCOND()
|
| H A D | MipsFastISel.cpp | 740 emitInst(Opc).addReg(Mips::FCC0, RegState::Define).addReg(LeftReg) in emitCmp() 744 .addReg(Mips::FCC0) in emitCmp()
|
| H A D | MipsInstructionSelector.cpp | 891 .addUse(Mips::FCC0) in select()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsInstPrinter.cpp | 300 return isReg<Mips::FCC0>(MI, 0) && in printAlias() 304 return isReg<Mips::FCC0>(MI, 0) && in printAlias()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/Disassembler/ |
| H A D | LoongArchDisassembler.cpp | 90 Inst.addOperand(MCOperand::createReg(LoongArch::FCC0 + RegNo)); in DecodeCFRRegisterClass()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcInstrAliases.td | 631 def : InstAlias<"fcmps $rs1, $rs2", (V9FCMPS FCC0, FPRegs:$rs1, FPRegs:$rs2)>; 632 def : InstAlias<"fcmpd $rs1, $rs2", (V9FCMPD FCC0, DFPRegs:$rs1, DFPRegs:$rs2)>; 633 def : InstAlias<"fcmpq $rs1, $rs2", (V9FCMPQ FCC0, QFPRegs:$rs1, QFPRegs:$rs2)>, 636 def : InstAlias<"fcmpes $rs1, $rs2", (V9FCMPES FCC0, FPRegs:$rs1, FPRegs:$rs2)>; 637 def : InstAlias<"fcmped $rs1, $rs2", (V9FCMPED FCC0, DFPRegs:$rs1, 639 def : InstAlias<"fcmpeq $rs1, $rs2", (V9FCMPEQ FCC0, QFPRegs:$rs1,
|
| H A D | SparcInstrInfo.td | 593 let usesCustomInserter = 1, Uses = [FCC0] in { 974 let Uses = [FCC0] in { 983 let Predicates = [HasV9], Uses = [FCC0], cc = 0, 1414 let Defs = [FCC0], rd = 0, isCodeGenOnly = 1 in { 1439 let Predicates = [HasV9], Defs = [FCC0], rd = 0, isCodeGenOnly = 1 in { 1537 let Uses = [FCC0], intcc = 0, cc = 0b00 in { 1570 let Uses = [FCC0], intcc = 0, opf_cc = 0b00 in {
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/MCTargetDesc/ |
| H A D | SparcInstPrinter.cpp | 93 || (MI->getOperand(0).getReg() != SP::FCC0)) in printSparcAliasInstr()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/Disassembler/ |
| H A D | SparcDisassembler.cpp | 101 SP::FCC0, SP::FCC1, SP::FCC2, SP::FCC3 };
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 1427 RegNo = Sparc::FCC0 + intVal; in matchRegisterName()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 5977 (Inst.getOperand(0).getReg() != Mips::FCC0) && !hasEightFccRegisters()) in checkTargetMatchPredicate()
|
| /freebsd-14.2/crypto/heimdal/lib/wind/ |
| H A D | NormalizationTest.txt | 14234 FCC0;FCC0;FCC0;0641 062E;0641 062E; # (ﳀ; ﳀ; ﳀ; فخ; فخ; ) ARABIC LIGATURE FEH WITH KHAH INITIAL FORM
|
| H A D | UnicodeData.txt | 11379 FCC0;ARABIC LIGATURE FEH WITH KHAH INITIAL FORM;Lo;0;AL;<initial> 0641 062E;;;;N;;;;;
|
| /freebsd-14.2/tools/tools/locale/etc/final-maps/ |
| H A D | map.UTF-8 | 286031 <PRIVATE_USE_AREA-10FCC0> \xF4\x8F\xB3\x80
|