Searched refs:ExtendedVT (Results 1 – 2 of 2) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 14137 EVT ExtendedVT = MVT::getIntegerVT(std::max(64u / NumElems, 8u)); in getVectorBitwiseReduce() local
14143 ExtendOp, DL, VecVT.changeVectorElementType(ExtendedVT), Vec); in getVectorBitwiseReduce()
14146 Result = DAG.getNode(ISD::VECREDUCE_UMIN, DL, ExtendedVT, Extended); in getVectorBitwiseReduce()
14149 Result = DAG.getNode(ISD::VECREDUCE_UMAX, DL, ExtendedVT, Extended); in getVectorBitwiseReduce()
14152 Result = DAG.getNode(ISD::VECREDUCE_ADD, DL, ExtendedVT, Extended); in getVectorBitwiseReduce()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 43234 MVT ExtendedVT = MVT::getVectorVT(MVT::i8, RegSize / 8); in createVPDPBUSD() local
43235 SDValue DpOp0 = DAG.getNode(ISD::CONCAT_VECTORS, DL, ExtendedVT, Ops); in createVPDPBUSD()
43237 SDValue DpOp1 = DAG.getNode(ISD::CONCAT_VECTORS, DL, ExtendedVT, Ops); in createVPDPBUSD()
43267 MVT ExtendedVT = MVT::getVectorVT(MVT::i8, RegSize / 8); in createPSADBW() local
43268 SDValue SadOp0 = DAG.getNode(ISD::CONCAT_VECTORS, DL, ExtendedVT, Ops); in createPSADBW()
43270 SDValue SadOp1 = DAG.getNode(ISD::CONCAT_VECTORS, DL, ExtendedVT, Ops); in createPSADBW()
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