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Searched refs:ExtVT (Results 1 – 18 of 18) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp6423 if (ExtVT == LoadedVT && in isAndLoadExtLoad()
6437 if (!LoadedVT.bitsGT(ExtVT) || !ExtVT.isRound()) in isAndLoadExtLoad()
6563 EVT ExtVT; in SearchForAndLoads() local
6590 if (ExtVT.bitsGE(VT)) in SearchForAndLoads()
6988 EVT ExtVT = VT; in visitAND() local
11001 if (TLI.isTruncateFree(VT, ExtVT) && TLI.isZExtFree(ExtVT, VT) && in visitABS()
13780 EVT ExtVT; in visitZERO_EXTEND() local
14181 EVT ExtVT = VT; in reduceLoadWidth() local
14311 ExtVT = MaskedVT; in reduceLoadWidth()
14706 if (ExtVT.bitsLT(VT) && TLI.preferSextInRegOfTruncate(VT, SrcVT, ExtVT)) { in visitTRUNCATE()
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H A DLegalizeIntegerTypes.cpp1544 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(), NVT.getVectorElementType(), in PromoteIntRes_TRUNCATE() local
1546 SDValue WideExt = DAG.getNode(ISD::ZERO_EXTEND, dl, ExtVT, WideTrunc); in PromoteIntRes_TRUNCATE()
5468 EVT ExtVT = N->getMemoryVT(); in ExpandIntOp_STORE() local
5469 unsigned EBytes = ExtVT.getStoreSize(); in ExpandIntOp_STORE()
5473 ExtVT.getSizeInBits() - ExcessBits); in ExpandIntOp_STORE()
5601 EVT ExtVT = NOutVT.changeVectorElementType(PromEltVT); in PromoteIntRes_EXTRACT_SUBVECTOR() local
5602 SDValue Ext = DAG.getNode(ISD::EXTRACT_SUBVECTOR, SDLoc(N), ExtVT, Ops); in PromoteIntRes_EXTRACT_SUBVECTOR()
H A DLegalizeVectorTypes.cpp445 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType(); in ScalarizeVecRes_InregOp() local
448 LHS, DAG.getValueType(ExtVT)); in ScalarizeVecRes_InregOp()
5011 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(), in WidenVecRes_InregOp() local
5017 WidenVT, WidenLHS, DAG.getValueType(ExtVT)); in WidenVecRes_InregOp()
5642 EVT ExtVT = EVT::getVectorVT(Ctx, ToMaskVT.getVectorElementType(), in convertMask() local
5644 Mask = DAG.getNode(ISD::SIGN_EXTEND, SDLoc(Mask), ExtVT, Mask); in convertMask()
H A DTargetLowering.cpp2025 EVT ExtVT = EVT::getIntegerVT(*TLO.DAG.getContext(), LowBits); in SimplifyDemandedBits() local
2027 ExtVT = EVT::getVectorVT(*TLO.DAG.getContext(), ExtVT, in SimplifyDemandedBits()
2032 getOperationAction(ISD::SIGN_EXTEND_INREG, ExtVT) == Legal) in SimplifyDemandedBits()
2036 TLO.DAG.getValueType(ExtVT))); in SimplifyDemandedBits()
H A DSelectionDAG.cpp12132 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); in UnrollVectorOp() local
12135 getValueType(ExtVT))); in UnrollVectorOp()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp12087 MVT ExtVT = VT; in lowerShuffleAsElementInsertion() local
12132 ExtVT = MVT::getVectorVT(MVT::i32, ExtVT.getSizeInBits() / 32); in lowerShuffleAsElementInsertion()
12182 if (ExtVT != VT) in lowerShuffleAsElementInsertion()
17307 MVT ExtVT; in lower1BitShuffle() local
20056 MVT ExtVT = VT; in LowerZERO_EXTEND_Mask() local
20066 MVT WideVT = ExtVT; in LowerZERO_EXTEND_Mask()
20082 if (VT != ExtVT) { in LowerZERO_EXTEND_Mask()
20495 InVT = ExtVT; in LowerTruncateVecI1()
24154 MVT ExtVT = VT; in LowerSIGN_EXTEND_Mask() local
24185 if (VT != ExtVT) { in LowerSIGN_EXTEND_Mask()
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H A DX86ISelLowering.h1058 EVT ExtVT) const override;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallLowering.cpp339 EVT ExtVT = TLI.getTypeForExtReturn(Ctx, VT, in lowerReturnVal() local
341 if (ExtVT != VT) { in lowerReturnVal()
342 RetInfo.Ty = ExtVT.getTypeForEVT(Ctx); in lowerReturnVal()
H A DAMDGPUISelLowering.h220 EVT ExtVT) const override;
H A DAMDGPUISelLowering.cpp3865 EVT ExtVT = cast<VTSDNode>(N1)->getVT(); in performAssertSZExtCombine() local
3870 if (SrcVT.bitsGE(ExtVT)) { in performAssertSZExtCombine()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp2496 MVT ExtVT; in performVectorExtendToFPCombine() local
2498 ExtVT = MVT::v4i32; in performVectorExtendToFPCombine()
2500 ExtVT = MVT::v2i32; in performVectorExtendToFPCombine()
2506 SDValue Conv = DAG.getNode(Op, SDLoc(N), ExtVT, N->getOperand(0)); in performVectorExtendToFPCombine()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DBasicTTIImpl.h1087 EVT ExtVT = EVT::getEVT(Dst);
1092 TLI->isLoadExtLegal(LType, ExtVT, LoadVT))
H A DTargetLowering.h877 virtual bool preferSextInRegOfTruncate(EVT TruncVT, EVT VT, EVT ExtVT) const { in preferSextInRegOfTruncate() argument
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp8119 EVT ExtVT = VT.getVectorElementType(); in LowerBUILD_VECTOR() local
8120 EVT HVT = EVT::getVectorVT(*DAG.getContext(), ExtVT, NumElts / 2); in LowerBUILD_VECTOR()
9379 EVT ExtVT = ToVT.getHalfNumVectorElementsVT(*DAG.getContext()); in LowerVectorExtend() local
9381 ExtVT = MVT::v8i16; in LowerVectorExtend()
9385 SDValue Ext = DAG.getNode(Opcode, DL, DAG.getVTList(ExtVT, ExtVT), Op); in LowerVectorExtend()
17993 MVT ExtVT, HalfVT; in PerformMinMaxCombine() local
17996 ExtVT = MVT::v4i16; in PerformMinMaxCombine()
17999 ExtVT = MVT::v8i8; in PerformMinMaxCombine()
18010 DAG.getValueType(ExtVT)); in PerformMinMaxCombine()
18767 DAG.getValueType(ExtVT)) in PerformMVEExtCombine()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp4062 MVT ExtVT = in LowerVectorFP_TO_INT() local
4071 SDValue Ext = DAG.getNode(ISD::FP_EXTEND, dl, ExtVT, Op.getOperand(0)); in LowerVectorFP_TO_INT()
5528 EVT ExtVT = ExtVal.getValueType(); in isVectorLoadExtDesirable() local
5529 if (!ExtVT.isScalableVector() && !Subtarget->useSVEForFixedLengthVectors()) in isVectorLoadExtDesirable()
5541 if (!ExtVT.isScalableVector()) in isVectorLoadExtDesirable()
19047 if (!DAG.getTargetLoweringInfo().isTypeLegal(ExtVT)) in performBuildVectorCombine()
19052 SDValue Ext = DAG.getNode(ISD::ANY_EXTEND, DL, ExtVT, VecToExtend); in performBuildVectorCombine()
19987 EVT ExtVT = in performIntrinsicCombine() local
19994 Res = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ExtVT, Res, in performIntrinsicCombine()
23313 EVT ExtVT = VT.getDoubleNumVectorElementsVT(*DAG.getContext()); in performSignExtendInRegCombine() local
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp6533 EVT ExtVT = Op.getValueType(); in combineExtract() local
6535 unsigned ExtBytesPerElement = ExtVT.getVectorElementType().getStoreSize(); in combineExtract()
7317 EVT ExtVT = EVT::getVectorVT( in combineINT_TO_FP() local
7321 SDValue ExtOp = DAG.getNode(ExtOpcode, SDLoc(N), ExtVT, Op); in combineINT_TO_FP()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp8627 EVT ExtVT = Src.getValueType(); in LowerINT_TO_FPVector() local
8629 ExtVT = EVT::getVectorVT(*DAG.getContext(), WideVT.getVectorElementType(), in LowerINT_TO_FPVector()
8633 DAG.getValueType(ExtVT)); in LowerINT_TO_FPVector()
14667 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(), in addShuffleForVecExtend() local
14671 DAG.getValueType(ExtVT)); in addShuffleForVecExtend()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp7616 MVT ExtVT = Op.getSimpleValueType(); in lowerFixedLengthVectorExtendToRVV() local
7618 if (!ExtVT.isFixedLengthVector()) in lowerFixedLengthVectorExtendToRVV()
7624 MVT ContainerExtVT = getContainerForFixedLengthVector(ExtVT); in lowerFixedLengthVectorExtendToRVV()
7638 return convertFromScalableVector(ExtVT, Ext, DAG, Subtarget); in lowerFixedLengthVectorExtendToRVV()