| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | VectorCombine.cpp | 369 return Ext1; in getShuffleExtract()
374 return Ext1; in getShuffleExtract()
379 return Index0 > Index1 ? Ext0 : Ext1; in getShuffleExtract()
444 bool HasUseTax = Ext0 == Ext1 ? !Ext0->hasNUses(2) in isExtractExtractCheap()
454 !Ext1->hasOneUse() * Extract1Cost; in isExtractExtractCheap()
586 auto *Ext1 = cast<ExtractElementInst>(I1); in foldExtractExtract() local
605 Ext1 = NewExtract; in foldExtractExtract()
609 foldExtExtCmp(Ext0, Ext1, I); in foldExtractExtract()
611 foldExtExtBinop(Ext0, Ext1, I); in foldExtractExtract()
614 Worklist.push(Ext1); in foldExtractExtract()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/BinaryFormat/ |
| H A D | MsgPack.def | 94 HANDLE_MP_FIX_LEN(0x01, Ext1)
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/BinaryFormat/ |
| H A D | MsgPackWriter.cpp | 179 case FixLen::Ext1: in writeExt()
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| H A D | MsgPackReader.cpp | 123 return createExt(Obj, FixLen::Ext1); in read()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9386 SDValue Ext1 = Ext.getValue(1); in LowerVectorExtend() local
9390 Ext1 = DAG.getNode(N->getOpcode(), DL, MVT::v8i32, Ext1); in LowerVectorExtend()
13359 SDValue Ext1 = Mul.getOperand(1); in PerformVQDMULHCombine() local
13361 Ext1.getOpcode() != ISD::SIGN_EXTEND) in PerformVQDMULHCombine()
13366 if (Ext1.getOperand(0).getValueType() != VecVT || in PerformVQDMULHCombine()
17222 SDValue Ext1 = in PerformVECREDUCE_ADDCombine() local
17227 Ext0, Ext1); in PerformVECREDUCE_ADDCombine()
17231 Ext0.getValue(1), Ext1.getValue(1)); in PerformVECREDUCE_ADDCombine()
19244 static bool areExtractExts(Value *Ext1, Value *Ext2) { in areExtractExts() argument
19250 if (!match(Ext1, m_ZExtOrSExt(m_Value())) || in areExtractExts()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 14913 if (!match(Ext1, m_ZExtOrSExt(m_Value())) || in areExtractExts()
14915 !areExtDoubled(cast<Instruction>(Ext1)) || in areExtractExts()
15119 auto Ext1 = cast<Instruction>(I->getOperand(0)); in shouldSinkOperands() local
15122 Ops.push_back(&Ext1->getOperandUse(0)); in shouldSinkOperands()
16712 SDValue Ext1 = Op1.getOperand(0); in performUADDVAddCombine() local
16715 Ext0.getOperand(0) != Ext1.getOperand(0)) in performUADDVAddCombine()
16724 (Ext1.getConstantOperandVal(1) != 0 || in performUADDVAddCombine()
16760 SDValue Ext1 = Op1.getOperand(0); in performUADDVZextCombine() local
16762 EVT ExtVT1 = Ext1.getValueType(); in performUADDVZextCombine()
19501 SDValue Ext0, Ext1; in performExtBinopLoadFold() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCompares.cpp | 2936 Instruction *Ext0, *Ext1; in foldICmpAddConstant() local
2940 m_CombineAnd(m_Instruction(Ext1), in foldICmpAddConstant()
2951 Res += isa<ZExtInst>(Ext1) ? 1 : -1; in foldICmpAddConstant()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 14873 SDValue Ext1 = FirstInput.getOperand(0); in DAGCombineBuildVector() local
14875 if(Ext1.getOpcode() != ISD::EXTRACT_VECTOR_ELT || in DAGCombineBuildVector()
14879 ConstantSDNode *Ext1Op = dyn_cast<ConstantSDNode>(Ext1.getOperand(1)); in DAGCombineBuildVector()
14883 if (Ext1.getOperand(0).getValueType() != MVT::v4i32 || in DAGCombineBuildVector()
14884 Ext1.getOperand(0) != Ext2.getOperand(0)) in DAGCombineBuildVector()
14897 SDValue SrcVec = Ext1.getOperand(0); in DAGCombineBuildVector()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 3655 auto Ext1 = B.buildFPExt(F32, Src1, Flags); in legalizeFPow() local
3658 .addUse(Ext1.getReg(0)) in legalizeFPow()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 12712 SDValue Ext1 = DAG.getNode(Opcode, DL, VT, Op1); in tryToFoldExtendSelectLoad() local
12714 return DAG.getSelect(DL, VT, N0->getOperand(0), Ext1, Ext2); in tryToFoldExtendSelectLoad()
13330 SDValue Ext1 = DAG.getNode(ExtOpcode, DL, VT, N01); in foldSextSetcc() local
13331 return DAG.getSetCC(DL, VT, Ext0, Ext1, CC); in foldSextSetcc()
22017 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, Op1, Index); in scalarizeExtractedBinop() local
22018 return DAG.getNode(Vec.getOpcode(), DL, VT, Ext0, Ext1); in scalarizeExtractedBinop()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 43869 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, OpVT, in scalarizeExtEltFP() local
43871 return DAG.getNode(Vec.getOpcode(), DL, VT, Ext0, Ext1, Vec.getOperand(2)); in scalarizeExtEltFP()
43893 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, in scalarizeExtEltFP() local
43897 return DAG.getNode(ISD::SELECT, DL, VT, Ext0, Ext1, Ext2); in scalarizeExtEltFP()
55628 SDValue Ext1 = extractSubVector(InVec.getOperand(1), 0, DAG, DL, 128); in combineEXTRACT_SUBVECTOR() local
55630 return DAG.getNode(InOpcode, DL, VT, Ext0, Ext1, Ext2); in combineEXTRACT_SUBVECTOR()
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