Home
last modified time | relevance | path

Searched refs:EndReg (Results 1 – 3 of 3) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVBaseInfo.h565 inline unsigned encodeRlist(MCRegister EndReg, bool IsRV32E = false) {
566 assert((!IsRV32E || EndReg <= RISCV::X9) && "Invalid Rlist for RV32E");
567 switch (EndReg) {
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DCallingConvLower.h446 unsigned& BeginReg, unsigned& EndReg) const { in getInRegsParamInfo() argument
452 EndReg = info.End; in getInRegsParamInfo()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp4510 int EndReg = tryParseRegister(); in parseRegisterList() local
4511 if (EndReg == -1) in parseRegisterList()
4517 EndReg = getDRegFromQReg(EndReg) + 1; in parseRegisterList()
4520 if (Reg == EndReg) in parseRegisterList()
4530 while (Reg != EndReg) { in parseRegisterList()
4771 if (EndReg == -1) in parseVectorList()
4775 EndReg = getDRegFromQReg(EndReg) + 1; in parseVectorList()
4778 if (Reg == EndReg) in parseVectorList()
4787 if (Reg > EndReg) in parseVectorList()
4798 Count += EndReg - Reg; in parseVectorList()
[all …]