Home
last modified time | relevance | path

Searched refs:Dst0Reg (Results 1 – 3 of 3) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp2094 Register Dst0Reg = MI.getOperand(0).getReg(); in applyCombineUnmergeWithDeadLanesToTrunc() local
2095 LLT Dst0Ty = MRI.getType(Dst0Reg); in applyCombineUnmergeWithDeadLanesToTrunc()
2098 Builder.buildCast(Dst0Reg, MIB); in applyCombineUnmergeWithDeadLanesToTrunc()
2100 Builder.buildTrunc(Dst0Reg, SrcReg); in applyCombineUnmergeWithDeadLanesToTrunc()
2107 Register Dst0Reg = MI.getOperand(0).getReg(); in matchCombineUnmergeZExtToZExt() local
2108 LLT Dst0Ty = MRI.getType(Dst0Reg); in matchCombineUnmergeZExtToZExt()
2134 Register Dst0Reg = MI.getOperand(0).getReg(); in applyCombineUnmergeZExtToZExt() local
2142 LLT Dst0Ty = MRI.getType(Dst0Reg); in applyCombineUnmergeZExtToZExt()
2148 Builder.buildZExt(Dst0Reg, ZExtSrcReg); in applyCombineUnmergeZExtToZExt()
2152 replaceRegWith(MRI, Dst0Reg, ZExtSrcReg); in applyCombineUnmergeZExtToZExt()
H A DLegalizerHelper.cpp1913 Register Dst0Reg = MI.getOperand(0).getReg(); in widenScalarUnmergeValues() local
1914 LLT DstTy = MRI.getType(Dst0Reg); in widenScalarUnmergeValues()
1943 MIRBuilder.buildTrunc(Dst0Reg, SrcReg); in widenScalarUnmergeValues()
7092 Register Dst0Reg = MI.getOperand(0).getReg(); in lowerUnmergeValues() local
7093 LLT DstTy = MRI.getType(Dst0Reg); in lowerUnmergeValues()
7104 MIRBuilder.buildTrunc(Dst0Reg, SrcReg); in lowerUnmergeValues()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructionSelector.cpp425 Register Dst0Reg = I.getOperand(0).getReg(); in selectG_UADDO_USUBO_UADDE_USUBE() local
453 auto CarryInst = BuildMI(*BB, &I, DL, TII.get(HasCarryIn ? CarryOpc : NoCarryOpc), Dst0Reg) in selectG_UADDO_USUBO_UADDE_USUBE()
466 if (!RBI.constrainGenericRegister(Dst0Reg, AMDGPU::SReg_32RegClass, *MRI) || in selectG_UADDO_USUBO_UADDE_USUBE()