Searched refs:DestSubReg (Results 1 – 3 of 3) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | LiveRangeEdit.cpp | 315 unsigned DestSubReg; in eliminateDeadDef() local
322 DestSubReg = MI->getOperand(0).getSubReg(); in eliminateDeadDef()
405 if (DestSubReg) { in eliminateDeadDef()
408 Alloc, TRI->getSubRegIndexLaneMask(DestSubReg)); in eliminateDeadDef()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600MachineScheduler.cpp | 251 unsigned DestSubReg = MI->getOperand(0).getSubReg(); in getAluKind() local
252 switch (DestSubReg) { in getAluKind()
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| H A D | SIInstrInfo.cpp | 754 Register DestSubReg = RI.getSubReg(DestReg, SubIdx); in expandSGPRCopy() local
756 assert(DestSubReg && SrcSubReg && "Failed to find subregs!"); in expandSGPRCopy()
760 bool AlignedDest = ((DestSubReg - AMDGPU::SGPR0) % 2) == 0; in expandSGPRCopy()
766 DestSubReg = RI.getSubReg(DestReg, SubIdx); in expandSGPRCopy()
768 assert(DestSubReg && SrcSubReg && "Failed to find subregs!"); in expandSGPRCopy()
773 LastMI = BuildMI(MBB, I, DL, TII.get(Opcode), DestSubReg) in expandSGPRCopy()
1110 Register DestSubReg = RI.getSubReg(DestReg, SubIdx); in copyPhysReg() local
1112 assert(DestSubReg && SrcSubReg && "Failed to find subregs!"); in copyPhysReg()
1120 indirectCopyToAGPR(*this, MBB, MI, DL, DestSubReg, SrcSubReg, UseKill, in copyPhysReg()
1124 BuildMI(MBB, MI, DL, get(AMDGPU::V_PK_MOV_B32), DestSubReg) in copyPhysReg()
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