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Searched refs:Delay (Results 1 – 25 of 92) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInsertDelayAlu.cpp272 if (Delay.TRANSNum < DelayInfo::TRANS_MAX) in emitDelayAlu()
273 Imm |= 4 + Delay.TRANSNum; in emitDelayAlu()
277 if (Delay.VALUNum < DelayInfo::VALU_MAX && in emitDelayAlu()
278 Delay.VALUNum <= Delay.TRANSNumVALU) { in emitDelayAlu()
280 Imm |= Delay.VALUNum << 7; in emitDelayAlu()
282 Imm |= Delay.VALUNum; in emitDelayAlu()
286 if (Delay.SALUCycles) { in emitDelayAlu()
292 Imm |= (Delay.SALUCycles + 8) << 7; in emitDelayAlu()
294 Imm |= Delay.SALUCycles + 8; in emitDelayAlu()
362 DelayInfo Delay; in runOnMachineBasicBlock() local
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/freebsd-14.2/sys/contrib/device-tree/Bindings/mmc/
H A Dsdhci-sprd.txt33 - sprd,phy-delay-legacy: Delay value for legacy timing.
34 - sprd,phy-delay-sd-highspeed: Delay value for SD high-speed timing.
35 - sprd,phy-delay-sd-uhs-sdr50: Delay value for SD UHS SDR50 timing.
36 - sprd,phy-delay-sd-uhs-sdr104: Delay value for SD UHS SDR50 timing.
37 - sprd,phy-delay-mmc-highspeed: Delay value for MMC high-speed timing.
38 - sprd,phy-delay-mmc-ddr52: Delay value for MMC DDR52 timing.
39 - sprd,phy-delay-mmc-hs200: Delay value for MMC HS200 timing.
40 - sprd,phy-delay-mmc-hs400: Delay value for MMC HS400 timing.
41 - sprd,phy-delay-mmc-hs400es: Delay value for MMC HS400 enhanced strobe timing.
H A Dmmc-pwrseq-simple.txt19 - post-power-on-delay-ms : Delay in ms after powering the card and
21 - power-off-delay-us : Delay in us after asserting the reset-gpios (if any)
H A Dmmc-pwrseq-simple.yaml42 Delay in ms after powering the card and de-asserting the
47 Delay in us after asserting the reset-gpios (if any)
/freebsd-14.2/sys/contrib/device-tree/Bindings/spi/
H A Dcdns,qspi-nor-peripheral-props.yaml20 Delay for read capture logic, in clock cycles.
24 Delay in nanoseconds for the length that the master mode chip select
29 Delay in nanoseconds between one chip select being de-activated
34 Delay in nanoseconds between last bit of current transaction and
39 Delay in nanoseconds between setting qspi_n_ss_out low and
H A Dcadence-quadspi.txt28 - cdns,read-delay : Delay for read capture logic, in clock cycles
29 - cdns,tshsl-ns : Delay in nanoseconds for the length that the master
32 - cdns,tsd2d-ns : Delay in nanoseconds between one chip select being
34 - cdns,tchsh-ns : Delay in nanoseconds between last bit of current
37 - cdns,tslch-ns : Delay in nanoseconds between setting qspi_n_ss_out low
H A Dspi-peripheral-props.yaml49 Delay in nanoseconds to be introduced by the controller after CS is
54 Delay in nanoseconds to be introduced by the controller before CS is
59 Delay in nanoseconds to be introduced by the controller after CS is
72 Delay, in microseconds, after a read transfer.
89 Delay, in microseconds, after a write transfer.
/freebsd-14.2/sys/contrib/device-tree/Bindings/mtd/
H A Dcadence-quadspi.txt27 - cdns,read-delay : Delay for read capture logic, in clock cycles
28 - cdns,tshsl-ns : Delay in nanoseconds for the length that the master
31 - cdns,tsd2d-ns : Delay in nanoseconds between one chip select being
33 - cdns,tchsh-ns : Delay in nanoseconds between last bit of current
36 - cdns,tslch-ns : Delay in nanoseconds between setting qspi_n_ss_out low
H A Dlpc32xx-slc.txt11 - nxp,wdr-clks: Delay before Ready signal is tested on write (W_RDY)
12 - nxp,rdr-clks: Delay before Ready signal is tested on read (R_RDY)
/freebsd-14.2/sys/contrib/device-tree/Bindings/memory-controllers/
H A Darm,pl172.txt67 - mpmc,write-enable-delay: Delay from chip select assertion to write
70 - mpmc,output-enable-delay: Delay from chip select assertion to output
73 - mpmc,write-access-delay: Delay from chip select assertion to write
76 - mpmc,read-access-delay: Delay from chip select assertion to read
79 - mpmc,page-mode-read-delay: Delay for asynchronous page mode sequential
82 - mpmc,turn-round-delay: Delay between access to memory banks in nano
/freebsd-14.2/sys/contrib/device-tree/Bindings/sound/
H A Ddmic.txt11 - wakeup-delay-ms: Delay (in ms) after enabling the DMIC
12 - modeswitch-delay-ms: Delay (in ms) to complete DMIC mode switch
H A Ddmic-codec.yaml34 description: Delay (in ms) to complete DMIC mode switch
37 description: Delay (in ms) after enabling the DMIC
/freebsd-14.2/sys/contrib/device-tree/Bindings/power/reset/
H A Dgpio-restart.txt40 - active-delay: Delay (default 100) to wait after driving gpio active [ms]
41 - inactive-delay: Delay (default 100) to wait after driving gpio inactive [ms]
42 - wait-delay: Delay (default 3000) to wait after completing restart
H A Dgpio-restart.yaml51 description: Delay (default 100) to wait after driving gpio active [ms]
56 description: Delay (default 100) to wait after driving gpio inactive [ms]
61 description: Delay (default 3000) to wait after completing restart sequence [ms]
H A Dgpio-poweroff.yaml37 description: Delay to wait after driving gpio active
41 description: Delay to wait after driving gpio inactive
H A Dgpio-poweroff.txt30 - active-delay-ms: Delay (default 100) to wait after driving gpio active
31 - inactive-delay-ms: Delay (default 100) to wait after driving gpio inactive
/freebsd-14.2/sys/contrib/device-tree/Bindings/net/
H A Dmdio.yaml44 Delay after reset deassert in microseconds. It applies to all MDIO
86 Delay after the reset was asserted in microseconds. If this
91 Delay after the reset was deasserted in microseconds. If
H A Dadi,adin.yaml21 RGMII RX Clock Delay used only when PHY operates in RGMII mode with
28 RGMII TX Clock Delay used only when PHY operates in RGMII mode with
H A Dcavium-pip.txt40 - rx-delay: Delay value for RGMII receive clock. Optional. Disabled if 0.
43 - tx-delay: Delay value for RGMII transmit clock. Optional. Disabled if 0.
H A Dethernet-phy.yaml175 Delay after the reset was asserted in microseconds. If this
180 Delay after the reset was deasserted in microseconds. If
190 RGMII Receive PHY Clock Delay defined in pico seconds. This is used for
196 RGMII Transmit PHY Clock Delay defined in pico seconds. This is used for
H A Drockchip-dwmac.yaml94 description: Delay value for TXD timing. Range value is 0~0x7F, 0x30 as default.
98 description: Delay value for RXD timing. Range value is 0~0x7F, 0x10 as default.
/freebsd-14.2/sys/contrib/device-tree/Bindings/gpio/
H A Dgpio-latch.yaml59 description: Delay in nanoseconds to wait after the latch inputs have been
63 description: Delay in nanoseconds to wait between clock output changes
/freebsd-14.2/sys/contrib/device-tree/Bindings/leds/backlight/
H A Dpwm-backlight.txt13 - post-pwm-on-delay-ms: Delay in ms between setting an initial (non-zero) PWM
15 - pwm-off-delay-ms: Delay in ms between disabling the backlight using GPIO
H A Dpwm-backlight.yaml34 Delay in ms between setting an initial (non-zero) PWM and enabling the
39 Delay in ms between disabling the backlight using GPIO and setting PWM
/freebsd-14.2/sys/contrib/device-tree/Bindings/serial/
H A Drs485.yaml22 - description: Delay between rts signal and beginning of data sent in
26 - description: Delay between end of data sent and rts signal in milliseconds.

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