Searched refs:DefRegs (Results 1 – 10 of 10) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineCopyPropagation.cpp | 111 SmallVector<MCRegister, 4> DefRegs; member
172 markRegsUnavailable(I->second.DefRegs, TRI); in clobberRegister()
201 for (auto itr = SrcCopy->second.DefRegs.begin(); in clobberRegister()
202 itr != SrcCopy->second.DefRegs.end(); itr++) { in clobberRegister()
204 SrcCopy->second.DefRegs.erase(itr); in clobberRegister()
210 if (SrcCopy->second.DefRegs.empty() && !SrcCopy->second.MI) { in clobberRegister()
244 if (!is_contained(Copy.DefRegs, Def)) in trackCopy()
245 Copy.DefRegs.push_back(Def); in trackCopy()
270 if (CI->second.DefRegs.size() != 1) in findCopyDefViaUnit()
272 MCRegUnit RU = *TRI.regunits(CI->second.DefRegs[0]).begin(); in findCopyDefViaUnit()
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| H A D | LiveVariables.cpp | 495 SmallVector<unsigned, 4> DefRegs; in runOnInstr() local
517 DefRegs.push_back(MOReg); in runOnInstr()
535 for (unsigned MOReg : DefRegs) { in runOnInstr()
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| H A D | MachineOutliner.cpp | 913 SmallSet<Register, 2> UseRegs, DefRegs; in outline() local
933 DefRegs.insert(MOP.getReg()); in outline()
950 for (const Register &I : DefRegs) in outline()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 2117 if (DefRegs.empty()) { in applyMappingSMULU64()
2123 assert(DefRegs.size() == 2); in applyMappingSMULU64()
2196 if (DefRegs.empty()) in applyMappingImpl()
2197 DefRegs.push_back(DstReg); in applyMappingImpl()
2303 if (DefRegs.empty()) in applyMappingImpl()
2304 DefRegs.push_back(DstReg); in applyMappingImpl()
2339 if (DefRegs.empty()) { in applyMappingImpl()
2415 if (DefRegs.empty()) { in applyMappingImpl()
2420 assert(DefRegs.size() == 2); in applyMappingImpl()
2743 extendLow32IntoHigh32(B, DefRegs[1], DefRegs[0], Opc, *SrcBank); in applyMappingImpl()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonExpandCondsets.cpp | 472 std::set<RegisterRef> DefRegs; in updateDeadsInRange() local
482 DefRegs.insert(Op); in updateDeadsInRange()
502 if (!Op.isReg() || !DefRegs.count(Op)) in updateDeadsInRange()
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| H A D | HexagonConstPropagation.cpp | 2841 SmallVector<unsigned,2> DefRegs; in rewriteHexConstDefs() local
2850 DefRegs.push_back(R); in rewriteHexConstDefs()
2863 for (unsigned R : DefRegs) { in rewriteHexConstDefs()
2954 AllDefs = (ChangedNum == DefRegs.size()); in rewriteHexConstDefs()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsInstrInfo.td | 1681 list<Register> DefRegs> :
1685 let Defs = DefRegs;
1717 list<Register> DefRegs> :
1720 let Defs = DefRegs;
1741 class MoveToLOHI<string opstr, RegisterOperand RO, list<Register> DefRegs>:
1744 let Defs = DefRegs;
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 2652 DenseMap<Register, bool> DefRegs; in emitSjLjDispatchBlock() local
2655 DefRegs[MOp.getReg()] = true; in emitSjLjDispatchBlock()
2660 if (!DefRegs[Reg]) in emitSjLjDispatchBlock()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 11276 DenseMap<unsigned, bool> DefRegs; in EmitSjLjDispatchBlock() local
11281 DefRegs[OI->getReg()] = true; in EmitSjLjDispatchBlock()
11296 if (!DefRegs[Reg]) in EmitSjLjDispatchBlock()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 35938 DenseMap<unsigned, bool> DefRegs; in EmitSjLjDispatchBlock() local
35941 DefRegs[MOp.getReg()] = true; in EmitSjLjDispatchBlock()
35946 if (!DefRegs[Reg]) in EmitSjLjDispatchBlock()
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