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Searched refs:DefInst (Results 1 – 12 of 12) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFMISimplifyPatchable.cpp142 MachineInstr *DefInst = MO.getParent(); in checkADDrr() local
143 unsigned Opcode = DefInst->getOpcode(); in checkADDrr()
155 const MachineOperand &ImmOp = DefInst->getOperand(2); in checkADDrr()
163 const MachineOperand &Opnd = DefInst->getOperand(0); in checkADDrr()
168 BuildMI(*DefInst->getParent(), *DefInst, DefInst->getDebugLoc(), TII->get(COREOp)) in checkADDrr()
169 .add(DefInst->getOperand(0)).addImm(Opcode).add(*BaseOp) in checkADDrr()
171 DefInst->eraseFromParent(); in checkADDrr()
332 MachineInstr *DefInst = MRI->getUniqueVRegDef(SrcReg); in removeLD() local
333 if (!DefInst) in removeLD()
336 if (DefInst->getOpcode() != BPF::LD_imm64) in removeLD()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUMemoryUtils.cpp69 Instruction *DefInst = Def->getMemoryInst(); in isReallyAClobber() local
71 if (isa<FenceInst>(DefInst)) in isReallyAClobber()
74 if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(DefInst)) { in isReallyAClobber()
102 if (checkNoAlias(dyn_cast<AtomicCmpXchgInst>(DefInst)) || in isReallyAClobber()
103 checkNoAlias(dyn_cast<AtomicRMWInst>(DefInst))) in isReallyAClobber()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DEarlyCSE.cpp680 Instruction *DefInst = nullptr; member
689 : DefInst(Inst), Generation(Generation), MatchingId(MatchingId), in LoadValue()
1251 if (InVal.DefInst == nullptr) in getMatchingValue()
1266 Instruction *Matching = MemInstMatching ? MemInst.get() : InVal.DefInst; in getMatchingValue()
1267 Instruction *Other = MemInstMatching ? InVal.DefInst : MemInst.get(); in getMatchingValue()
1274 if (MemInst.isStore() && InVal.DefInst != Result) in getMatchingValue()
1283 if (!isNonTargetIntrinsicMatch(cast<IntrinsicInst>(InVal.DefInst), in getMatchingValue()
1289 !isSameMemGeneration(InVal.Generation, CurrentGeneration, InVal.DefInst, in getMatchingValue()
1583 << " to: " << *InVal.DefInst << '\n'); in processNode()
1693 if (InVal.DefInst && in processNode()
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H A DDeadStoreElimination.cpp1138 bool isCompleteOverwrite(const MemoryLocation &DefLoc, Instruction *DefInst, in isCompleteOverwrite()
1152 return isOverwrite(UseInst, DefInst, *CC, DefLoc, InstWriteOffset, in isCompleteOverwrite()
2033 Instruction *DefInst = Def->getMemoryInst(); in eliminateRedundantStoresOfExistingValues() local
2034 auto MaybeDefLoc = getLocForWrite(DefInst); in eliminateRedundantStoresOfExistingValues()
2035 if (!MaybeDefLoc || !isRemovable(DefInst)) in eliminateRedundantStoresOfExistingValues()
2051 if (DefInst->isIdenticalTo(UpperInst)) in eliminateRedundantStoresOfExistingValues()
2054 if (auto *SI = dyn_cast<StoreInst>(DefInst)) { in eliminateRedundantStoresOfExistingValues()
2059 auto OR = isOverwrite(UpperInst, DefInst, UpperLoc, *MaybeDefLoc, in eliminateRedundantStoresOfExistingValues()
2069 if (!IsRedundantStore() || isReadClobber(*MaybeDefLoc, DefInst)) in eliminateRedundantStoresOfExistingValues()
2071 LLVM_DEBUG(dbgs() << "DSE: Remove No-Op Store:\n DEAD: " << *DefInst in eliminateRedundantStoresOfExistingValues()
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H A DNewGVN.cpp3965 auto *DefInst = dyn_cast_or_null<Instruction>(Def); in eliminateInstructions() local
3966 if (DefInst && AllTempInstructions.count(DefInst)) { in eliminateInstructions()
3967 auto *PN = cast<PHINode>(DefInst); in eliminateInstructions()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCPreEmitPeephole.cpp257 MachineBasicBlock::iterator DefInst; in addLinkerOpt() member
319 MachineBasicBlock::iterator BBI = Pair->DefInst; in addLinkerOpt()
342 Pair->DefInst->addOperand(ImplDef); in addLinkerOpt()
350 Pair->DefInst->addOperand(*MF, PCRelLabel); in addLinkerOpt()
H A DPPCBranchCoalescing.cpp464 MachineInstr *DefInst = MRI->getVRegDef(Use.getReg()); in canMoveToEnd() local
465 if (DefInst->isPHI() && DefInst->getParent() == MI.getParent()) { in canMoveToEnd()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonCopyToCombine.cpp406 MachineInstr *DefInst = LastDef[Reg]; in findPotentialNewifiableTFRs() local
407 if (!DefInst) in findPotentialNewifiableTFRs()
409 if (!isCombinableInstType(*DefInst, TII, ShouldCombineAggressively)) in findPotentialNewifiableTFRs()
414 MachineBasicBlock::iterator It(DefInst); in findPotentialNewifiableTFRs()
425 PotentiallyNewifiableTFR.insert(DefInst); in findPotentialNewifiableTFRs()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DRegAllocFast.cpp479 for (const MachineInstr &DefInst : MRI->def_instructions(VirtReg)) { in mayLiveOut() local
480 if (DefInst.getParent() != MBB) { in mayLiveOut()
484 if (!SelfLoopDef || dominates(PosIndexes, DefInst, *SelfLoopDef)) in mayLiveOut()
485 SelfLoopDef = &DefInst; in mayLiveOut()
527 for (const MachineInstr &DefInst : MRI->def_instructions(VirtReg)) { in mayLiveIn() local
528 if (DefInst.getParent() != MBB || ++C >= Limit) { in mayLiveIn()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Analysis/
H A DMemorySSA.cpp283 Instruction *DefInst = MD->getMemoryInst(); in instructionClobbersQuery() local
284 assert(DefInst && "Defining instruction not actually an instruction"); in instructionClobbersQuery()
286 if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(DefInst)) { in instructionClobbersQuery()
311 ModRefInfo I = AA.getModRefInfo(DefInst, CB); in instructionClobbersQuery()
315 if (auto *DefLoad = dyn_cast<LoadInst>(DefInst)) in instructionClobbersQuery()
319 ModRefInfo I = AA.getModRefInfo(DefInst, UseLoc); in instructionClobbersQuery()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIPeepholeSDWA.cpp506 const MachineInstr *DefInst = Def.getParent(); in foldToImm() local
507 if (!TII->isFoldableCopy(*DefInst)) in foldToImm()
510 const MachineOperand &Copied = DefInst->getOperand(1); in foldToImm()
H A DSIInstrInfo.cpp9219 auto *DefInst = MRI.getVRegDef(RSR.Reg); in getVRegSubRegDef() local
9220 while (auto *MI = DefInst) { in getVRegSubRegDef()
9221 DefInst = nullptr; in getVRegSubRegDef()
9230 DefInst = MRI.getVRegDef(RSR.Reg); in getVRegSubRegDef()
9238 DefInst = MRI.getVRegDef(RSR.Reg); in getVRegSubRegDef()
9241 if (!DefInst) in getVRegSubRegDef()