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Searched refs:DUP (Results 1 – 25 of 41) sorted by relevance

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/freebsd-14.2/contrib/arm-optimized-routines/pl/math/
H A Dpoly_sve_generic.h18 #ifndef DUP
19 # error Cannot use poly_generic without defining DUP
26 VTYPE p01 = svmla_x (pg, DUP (poly[0]), x, poly[1]); in VWRAP()
27 VTYPE p23 = svmla_x (pg, DUP (poly[2]), x, poly[3]); in VWRAP()
41 VTYPE p45 = svmla_x (pg, DUP (poly[4]), x, poly[5]); in VWRAP()
48 VTYPE p45 = svmla_x (pg, DUP (poly[4]), x, poly[5]); in VWRAP()
67 VTYPE p89 = svmla_x (pg, DUP (poly[8]), x, poly[9]); in VWRAP()
73 VTYPE p89 = svmla_x (pg, DUP (poly[8]), x, poly[9]); in VWRAP()
141 VTYPE p = svmla_x (pg, DUP (poly[2]), x, poly[3]); in VWRAP()
148 VTYPE p = svmla_x (pg, DUP (poly[3]), x, poly[4]); in VWRAP()
[all …]
H A Dpoly_sve_f32.h19 #define DUP svdup_f32 macro
21 #undef DUP
H A Dpoly_sve_f64.h19 #define DUP svdup_f64 macro
21 #undef DUP
/freebsd-14.2/cddl/contrib/opensolaris/lib/libdtrace/common/
H A Ddt_grammar.y38 #define DUP(s) strdup(s) macro
396 | DT_KEY_SELF { $$ = dt_node_ident(DUP("self")); }
397 | DT_KEY_THIS { $$ = dt_node_ident(DUP("this")); }
875 DT_KEY_PROBE { $$ = DUP("probe"); }
876 | DT_KEY_PROVIDER { $$ = DUP("provider"); }
877 | DT_KEY_SELF { $$ = DUP("self"); }
878 | DT_KEY_STRING { $$ = DUP("string"); }
879 | DT_TOK_STRINGOF { $$ = DUP("stringof"); }
880 | DT_KEY_USERLAND { $$ = DUP("userland"); }
881 | DT_TOK_XLATE { $$ = DUP("xlate"); }
[all …]
/freebsd-14.2/crypto/openssl/test/
H A Dcmp_ctx_test.c392 if (DUP && val1_read == val1) { \
421 if (DUP && val2_read == val2) { \
451 if (DUP && val3_read == val2_read) { \
513 #define DEFINE_SET_GET_TEST(OSSL_CMP, CTX, N, M, DUP, FIELD, TYPE) \ argument
540 #define DEFINE_SET_TEST(OSSL_CMP, CTX, N, DUP, FIELD, TYPE) \ argument
541 DEFINE_SET_TEST_DEFAULT(OSSL_CMP, CTX, N, DUP, FIELD, TYPE, IS_0)
611 #define DEFINE_PUSH_BASE_TEST(PUSHN, DUP, FIELD, ELEM, TYPE, T, \ argument
669 if (DUP && val1_read == val1) { \
693 if (DUP && val2_read == val2) { \
719 #define DEFINE_PUSH_TEST(N, DUP, FIELD, ELEM, TYPE) \ argument
[all …]
/freebsd-14.2/usr.bin/hexdump/
H A Ddisplay.c275 if (vflag != DUP) { in get()
304 if (vflag == DUP || vflag == FIRST) in get()
312 vflag = DUP; in get()
H A Dhexdump.h82 enum _vflag { ALL, DUP, FIRST, WAIT }; /* -v values */ enumerator
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMScheduleSwift.td933 (instregex "VLD1(LN|DUP)(d|q)(8|16|32)$", "VLD1(LN|DUP)(d|q)(8|16|32)Pseudo$")>;
935 (instregex "VLD1(LN|DUP)(d|q)(8|16|32)(wb|_UPD)",
939 (instregex "VLD2(DUP|LN)(d|q)(8|16|32|8x2|16x2|32x2)$",
953 (instregex "VLD3(DUP|LN)(d|q)(8|16|32)$",
954 "VLD3(LN|DUP)(d|q)(8|16|32)Pseudo$")>;
957 (instregex "VLD3(LN|DUP)(d|q)(8|16|32)_UPD")>;
960 (instregex "VLD3(LN|DUP)(d|q)(8|16|32)Pseudo_UPD")>;
964 (instregex "VLD4(LN|DUP)(d|q)(8|16|32)$",
965 "VLD4(LN|DUP)(d|q)(8|16|32)Pseudo$")>;
969 (instregex "VLD4(DUP|LN)(d|q)(8|16|32)_UPD")>;
[all …]
H A DARMScheduleA57.td145 "VLD(3|4)(DUP|LN)?(d|q)(WB_fixed_|WB_register_)?Asm",
147 "VST(3|4)(DUP|LN)?(d|q)(WB_fixed_|WB_register_)?Asm",
1276 "VLD1(LN|DUP)(d|q)(8|16|32)$", "VLD1(LN|DUP)(d|q)(8|16|32)Pseudo$")>;
1278 "VLD1(LN|DUP)(d|q)(8|16|32)(wb|_UPD)", "VLD1LNq(8|16|32)Pseudo_UPD")>;
1293 (instregex "VLD2(DUP|LN)(d|q)(8|16|32|8x2|16x2|32x2)$",
H A DARMScheduleM55.td350 def : InstRW<[M55Write2IntE2], (instregex "MVE_V(D|I)?W?DUP")>;
/freebsd-14.2/stand/ficl/
H A Dvm.c180 DUP,
227 case DUP:
/freebsd-14.2/crypto/heimdal/lib/kadm5/
H A Dkadm5_err.et18 error_code DUP, "Principal or policy already exists"
/freebsd-14.2/crypto/openssl/util/
H A Dcheck-format-test-negatives.c421 #define DEFINE_SET_GET_BASE_TEST(PREFIX, SETN, GETN, DUP, FIELD, TYPE, ERR, \ argument
/freebsd-14.2/share/examples/IPv6/
H A DUSAGE204 56 bytes from fe80::2a0:c9ff:fe84:ed6c%ed0, icmp_seq=0 hlim=64 time=1.333 ms(DUP!)
205 56 bytes from fe80::5254:ff:feda:d161%ed0, icmp_seq=0 hlim=64 time=1.459 ms(DUP!)
206 56 bytes from fe80::260:97ff:fec2:80bf%ed0, icmp_seq=0 hlim=64 time=1.538 ms(DUP!)
207 56 bytes from 3ffe:501:4819:2000:5054:ff:fedb:aa46, icmp_seq=0 hlim=255 time=1.615 ms(DUP!)
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedFalkorDetails.td909 def : InstRW<[FalkorWr_1GTOV_1cyc], (instregex "^DUP(v8i8|v4i16|v2i32)(gpr|lane)$")>;
910 def : InstRW<[FalkorWr_1VXVY_1cyc], (instregex "^DUP(v16i8|v8i16)(gpr|lane)$")>;
911 def : InstRW<[FalkorWr_1VXVY_1cyc], (instregex "^DUP(i8|i16|i32|i64)$")>;
937 def : InstRW<[FalkorWr_2GTOV_1cyc], (instregex "^DUP(v4i32|v2i64)(gpr|lane)$")>;
H A DAArch64SchedCyclone.td367 // DUP V,R
370 // DUP V,V[x] is a WriteV.
H A DAArch64SchedTSV110.td673 def : InstRW<[TSV110Wr_2cyc_1FSU1_1FSU2], (instregex "^(DUP|INS)v.+lane")>;
681 def : InstRW<[TSV110Wr_4cyc_1F], (instregex "^(INS|DUP)v.+gpr")>;
H A DAArch64ISelLowering.h173 DUP, enumerator
H A DAArch64SchedA55.td366 def : InstRW<[CortexA55WriteFPALU_F2], (instregex "^DUP(v2i64|v4i32|v8i16|v16i8)")>;
H A DAArch64InstrInfo.td693 def AArch64dup : SDNode<"AArch64ISD::DUP", SDT_AArch64Dup>;
6114 // AdvSIMD scalar DUP instruction
6117 defm DUP : SIMDScalarDUP<"mov">;
6180 // AdvSIMD INS/DUP instructions
6199 // DUP from a 64-bit register to a 64-bit register is just a copy
6269 (DUP V128:$Rn, (IdxXFORM imm:$idx))>;
6284 multiclass DUPWithTrunci64Pats<ValueType ResVT, Instruction DUP,
6288 (DUP V128:$Rn, (IdxXFORM imm:$idx))>;
6579 // subregister extractions, or a MOV (aka DUP here) if
7210 // and DUP scalar.
[all …]
H A DAArch64ISelLowering.cpp2131 case AArch64ISD::DUP: { in computeKnownBitsForTargetNode()
2428 MAKE_CASE(AArch64ISD::DUP) in getTargetNodeName()
2963 if (N->getOpcode() != AArch64ISD::DUP) in isZerosVector()
13667 if (Op.getOpcode() != AArch64ISD::DUP && in isPow2Splat()
18061 if (N0.getOpcode() == AArch64ISD::DUP) in performExtractVectorEltCombine()
18502 case AArch64ISD::DUP: in tryExtendDUPToExtractHigh()
19065 N0.getOpcode() == AArch64ISD::DUP) { in performTruncateCombine()
19781 if (Comparator.getOpcode() == AArch64ISD::DUP || in tryConvertSVEWideCompare()
22920 if (N->getOpcode() == AArch64ISD::DUP) { in performDUPCombine()
23933 case AArch64ISD::DUP: in PerformDAGCombine()
[all …]
H A DAArch64SchedExynosM3.td673 def : InstRW<[M3WriteNSHF1], (instregex "^DUP(i8|i16|i32|i64)$")>;
H A DAArch64SchedKryoDetails.td573 (instregex "DUP(v8i8|v4i16|v2i32)(gpr|lane)")>;
579 (instregex "DUP(v16i8|v8i16|v4i32|v2i64)(gpr|lane)")>;
H A DAArch64SchedA57.td530 def : InstRW<[A57Write_8cyc_1L_1V], (instregex "^DUP(i8|i16|i32|i64)$")>;
H A DAArch64ISelDAGToDAG.cpp193 else if (Op.getOperand(1).getOpcode() == AArch64ISD::DUP && in SelectRoundingVLShr()
212 case AArch64ISD::DUP: in SelectDupZeroOrUndef()
230 case AArch64ISD::DUP: in SelectDupZero()
246 case AArch64ISD::DUP: in SelectDupNegativeZero()

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