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Searched refs:DRD (Results 1 – 25 of 28) sorted by relevance

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/freebsd-14.2/sys/contrib/device-tree/Bindings/usb/
H A Dcdns-usb3.txt1 Binding for the Cadence USBSS-DRD controller
8 - OTG/DRD registers area
12 "otg" - for OTG/DRD registers space
17 "otg" - interrupt used by DRD/OTG part of driver
41 <0xf3020000 0x10000>; /* memory area for OTG/DRD registers */
H A Drenesas,rzv2m-usb3drd.yaml7 title: Renesas RZ/V2M USB 3.1 DRD controller
13 The RZ/V2{M, MA} USB3.1 DRD module supports the following functions
30 - description: Dual Role Device (DRD)
H A Dcdns,usb3.yaml7 title: Cadence USBSS-DRD controller
33 - description: OTG/DRD controller interrupt
H A Dmediatek,mtu3.yaml8 title: MediaTek USB3 DRD Controller
17 The DRD controller has a glue layer IPPC (IP Port Control), and its host is
69 - description: DRD controller clock
H A Dmediatek,musb.txt1 MediaTek musb DRD/OTG controller
H A Dmediatek,musb.yaml8 title: MediaTek MUSB DRD/OTG Controller
H A Dti,am62-usb.yaml7 title: TI's AM62 wrapper module for the Synopsys USBSS-DRD controller
H A Dti,j721e-usb.yaml7 title: TI wrapper module for the Cadence USBSS-DRD controller
H A Dusb-drd.yaml26 mode. In case this attribute isn't passed via DT, USB DRD controllers
H A Dgeneric.txt13 passed via DT, USB DRD controllers should default to
H A Dgeneric-ohci.yaml76 - if a USB DRD channel: first clock should be host and second
H A Dgeneric-ehci.yaml101 - if a USB DRD channel: first clock should be host and second
H A Dmediatek,mtu3.txt1 The device node for Mediatek USB3.0 DRD controller
H A Dsnps,dwc3.yaml45 interrupts for the host, gadget and DRD modes.
/freebsd-14.2/sys/contrib/device-tree/Bindings/phy/
H A Dbrcm,ns2-drd-phy.txt8 icfg - for DRD ICFG configurations
9 rst-ctrl - for DRD IDM reset
H A Dsamsung,usb3-drd-phy.yaml7 title: Samsung Exynos SoC USB 3.0 DRD PHY USB 2.0 PHY
21 For SoCs like Exynos5420 having multiple USB 3.0 DRD PHY controllers,
42 - Main PHY clock (same as USB DRD controller i.e. DWC3 IP clock), used
H A Dsamsung-phy.txt141 Samsung Exynos5 SoC series USB DRD PHY controller
150 - reg : Register offset and length of USB DRD PHY register set;
154 - phy: main PHY clock (same as USB DRD controller i.e. DWC3 IP clock),
185 - aliases: For SoCs like Exynos5420 having multiple USB 3.0 DRD PHY controllers,
/freebsd-14.2/contrib/llvm-project/clang/lib/CodeGen/
H A DModuleBuilder.cpp260 if (auto *DRD = dyn_cast<OMPDeclareReductionDecl>(Member)) { in HandleTagDeclDefinition() local
261 if (Ctx->DeclMustBeEmitted(DRD)) in HandleTagDeclDefinition()
262 Builder->EmitGlobal(DRD); in HandleTagDeclDefinition()
H A DCGOpenMPRuntime.cpp592 return DRD; in getReductionInit()
601 if (DRD->getInitializer()) { in emitInitWithReductionInitializer()
666 if (DRD) in EmitOMPAggregateInit()
670 if (DRD) in EmitOMPAggregateInit()
691 if (DRD) { in EmitOMPAggregateInit()
717 if (DRD) { in EmitOMPAggregateInit()
759 DRD && (DRD->getInitializer() || !PrivateVD->hasInit()); in emitAggregateInitialization()
861 if (DRD && DRD->getInitializer()) in emitInitialization()
864 } else if (DRD && (DRD->getInitializer() || !PrivateVD->hasInit())) { in emitInitialization()
992 return DRD && DRD->getInitializer(); in usesReductionInitializer()
[all …]
H A DCGOpenMPRuntime.h168 const OMPDeclareReductionDecl *DRD);
/freebsd-14.2/sys/contrib/device-tree/Bindings/clock/
H A Dsamsung,exynos850-clock.yaml205 - description: USB 2.0 DRD clock (from CMU_TOP)
/freebsd-14.2/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8-ss-conn.dtsi162 <0x5b120000 0x10000>; /* memory area for OTG/DRD registers */
/freebsd-14.2/contrib/llvm-project/clang/lib/Sema/
H A DSemaOpenMP.cpp22565 DC->addDecl(DRD); in ActOnOpenMPDeclareReductionDirectiveStart()
22566 DRD->setAccess(AS); in ActOnOpenMPDeclareReductionDirectiveStart()
22567 Decls.push_back(DRD); in ActOnOpenMPDeclareReductionDirectiveStart()
22569 DRD->setInvalidDecl(); in ActOnOpenMPDeclareReductionDirectiveStart()
22571 PrevDRD = DRD; in ActOnOpenMPDeclareReductionDirectiveStart()
22587 PushDeclContext(S, DRD); in ActOnOpenMPDeclareReductionCombinerStart()
22589 CurContext = DRD; in ActOnOpenMPDeclareReductionCombinerStart()
22615 DRD->addDecl(OmpInParm); in ActOnOpenMPDeclareReductionCombinerStart()
22636 DRD->setInvalidDecl(); in ActOnOpenMPDeclareReductionCombinerEnd()
22649 CurContext = DRD; in ActOnOpenMPDeclareReductionInitializerStart()
[all …]
/freebsd-14.2/sys/contrib/device-tree/Bindings/connector/
H A Dusb-connector.yaml88 Dual Role Device (DRD).
/freebsd-14.2/contrib/llvm-project/clang/lib/Parse/
H A DParseOpenMP.cpp366 DeclGroupPtrTy DRD = Actions.ActOnOpenMPDeclareReductionDirectiveStart( in ParseOpenMPDeclareReductionDirective() local
372 for (Decl *D : DRD.get()) { in ParseOpenMPDeclareReductionDirective()
447 return Actions.ActOnOpenMPDeclareReductionDirectiveEnd(getCurScope(), DRD, in ParseOpenMPDeclareReductionDirective()

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