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Searched refs:DP (Results 1 – 25 of 138) sorted by relevance

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/freebsd-14.2/sbin/hastd/
H A Dtoken.l44 #define DP do { } while (0) macro
62 exec { DP; return EXEC; }
65 name { DP; return NAME; }
66 local { DP; return LOCAL; }
69 on { DP; return ON; }
70 off { DP; return OFF; }
73 async { DP; return ASYNC; }
74 none { DP; return NONE; }
75 crc32 { DP; return CRC32; }
77 hole { DP; return HOLE; }
[all …]
/freebsd-14.2/contrib/openbsm/bin/auditdistd/
H A Dtoken.l52 #define DP do { } while (0) macro
64 host { DP; return HOST; }
65 keyfile { DP; return KEYFILE; }
66 listen { DP; return LISTEN; }
67 name { DP; return NAME; }
69 pidfile { DP; return PIDFILE; }
71 remote { DP; return REMOTE; }
72 sender { DP; return SENDER; }
73 source { DP; return SOURCE; }
77 \{ { DP; depth++; return OB; }
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/IR/
H A DDiagnosticInfo.cpp64 DP << getMsgStr(); in print()
94 DP << getFileName(); in print()
97 DP << ": "; in print()
99 DP << getMsg(); in print()
105 DP << getMsg(); in print()
345 DP << Diagnostic; in print()
349 DP << Diagnostic; in print()
371 DP << Str; in print()
446 DP << "error\""; in print()
448 DP << "warn\""; in print()
[all …]
/freebsd-14.2/sys/contrib/device-tree/Bindings/display/
H A Ddp-aux-bus.yaml14 are hooked up to them. This is the DP AUX bus. Over the DP AUX bus
16 particular, DP sinks support DDC over DP AUX which allows tunneling
19 To model this relationship, DP sinks should be placed as children
20 of the DP controller under the "aux-bus" node.
23 possible it will be extended in the future to handle the DP case.
24 For DP, presumably a connector would be listed under the DP AUX
/freebsd-14.2/sys/contrib/device-tree/Bindings/clock/
H A Dqcom,sm8450-dispcc.yaml34 - description: Link clock from DP PHY0
35 - description: VCO DIV clock from DP PHY0
36 - description: Link clock from DP PHY1
37 - description: VCO DIV clock from DP PHY1
38 - description: Link clock from DP PHY2
39 - description: VCO DIV clock from DP PHY2
40 - description: Link clock from DP PHY3
41 - description: VCO DIV clock from DP PHY3
H A Dqcom,sm8550-dispcc.yaml34 - description: Link clock from DP PHY0
35 - description: VCO DIV clock from DP PHY0
36 - description: Link clock from DP PHY1
37 - description: VCO DIV clock from DP PHY1
38 - description: Link clock from DP PHY2
39 - description: VCO DIV clock from DP PHY2
40 - description: Link clock from DP PHY3
41 - description: VCO DIV clock from DP PHY3
H A Dqcom,sc7180-dispcc.yaml28 - description: Link clock from DP PHY
29 - description: VCO DIV clock from DP PHY
H A Dqcom,dispcc-sm6125.yaml29 - description: Link clock from DP PHY
30 - description: VCO DIV clock from DP PHY
H A Dqcom,dispcc-sm6350.yaml28 - description: Link clock from DP PHY
29 - description: VCO DIV clock from DP PHY
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCScheduleP9.td103 def DP : ProcResource<4>;
105 //Even DP pipelines
106 let Super = DP;
109 //Odd DP pipelines
110 let Super = DP;
244 // DP Unit
247 def P9_DP_5C : SchedWriteRes<[DP]> {
251 def P9_DP_7C : SchedWriteRes<[DP]> {
263 def P9_DP_22C_5 : SchedWriteRes<[DP]> {
278 def P9_DP_26C_5 : SchedWriteRes<[DP]> {
[all …]
H A DP9InstrResources.td107 (instregex "XSMAX(C|J)?DP$"),
108 (instregex "XSMIN(C|J)?DP$"),
109 (instregex "XSCMP(EQ|EXP|GE|GT|O|U)DP$"),
401 // 5 cycle Restricted DP operation. One DP unit, one EXEC pipeline and all three
409 // 7 cycle Restricted DP operation. One DP unit, one EXEC pipeline and all three
488 // 7 cycle DP operation. One DP unit, one EXEC pipeline and 1 dispatch units.
1143 // 36 Cycle DP Instruction.
1156 // 36 Cycle DP Vector Instruction.
1163 // 27 Cycle DP Vector Instruction.
1177 // 26 Cycle DP Instruction.
[all …]
H A DREADME_P9.txt306 - DP/QP Compare Exponents: xscmpexpdp xscmpexpqp
309 - DP Compare ==, >=, >, !=: xscmpeqdp xscmpgedp xscmpgtdp xscmpnedp
327 - Convert DP -> QP: xscvdpqp
334 - Round & Convert QP -> DP (dword[1] is set to zero): xscvqpdp xscvqpdpo
354 - (Round &) Convert DP <-> HP: xscvdphp xscvhpdp
383 - Insert Exponent DP/QP: xsiexpdp xsiexpqp
428 - Vector Insert Exponent DP/SP: xviexpdp xviexpsp
440 - Test Data Class SP/DP/QP: xststdcsp xststdcdp xststdcqp
449 - Vector Test Data Class SP/DP: xvtstdcsp xvtstdcdp
454 - Maximum/Minimum Type-C/Type-J DP: xsmaxcdp xsmaxjdp xsmincdp xsminjdp
[all …]
/freebsd-14.2/sys/contrib/device-tree/Bindings/display/bridge/
H A Dcdns,mhdp8546.yaml41 DP bridge clock, used by the IP to know how to translate a number of
42 clock cycles into a time (which is used to comply with DP standard timings
67 First input port representing the DP bridge input.
72 Second input port representing the DP bridge input.
77 Third input port representing the DP bridge input.
82 Fourth input port representing the DP bridge input.
87 Output port representing the DP bridge output.
H A Dmegachips-stdpxxxx-ge-b850v3-fw.txt2 STDP4028-ge-b850v3-fw bridges (LVDS-DP)
3 STDP2690-ge-b850v3-fw bridges (DP-DP++)
7 Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
H A Dtoshiba,tc358767.yaml12 description: The TC358767 is bridge device which converts DSI/DPI to eDP/DP
86 eDP/DP output port. The remote endpoint phandle should be a
88 optional, treated as DP panel if not defined
147 /* DPI input and DP output */
H A Danalogix,anx7625.yaml50 an array of swing register setting for DP tx lane0 PHY.
69 adjust 50ohm impedance of DP tx termination. 00:55 ohm,
77 an array of swing register setting for DP tx lane1 PHY.
78 DP TX lane1 swing register setting same with lane0
H A Dtoshiba,tc358767.txt17 to a DPI/DSI source and to an eDP/DP sink according to [1][2]:
20 - port@2: eDP/DP output port
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/IR/
H A DDiagnosticInfo.h131 virtual void print(DiagnosticPrinter &DP) const = 0;
177 void print(DiagnosticPrinter &DP) const override;
205 void print(DiagnosticPrinter &DP) const override;
227 void print(DiagnosticPrinter &DP) const override;
251 void print(DiagnosticPrinter &DP) const override;
281 void print(DiagnosticPrinter &DP) const override;
386 void print(DiagnosticPrinter &DP) const override;
470 void print(DiagnosticPrinter &DP) const override;
946 void print(DiagnosticPrinter &DP) const override;
965 void print(DiagnosticPrinter &DP) const override;
[all …]
/freebsd-14.2/sys/contrib/device-tree/Bindings/display/exynos/
H A Dexynos_dp.txt8 For the DP-PHY initialization, we use the dptx-phy node.
11 Base address of DP PHY register.
13 The bit-mask used to enable/disable DP PHY.
52 For the below properties, please refer to Analogix DP binding document:
/freebsd-14.2/sys/contrib/device-tree/Bindings/display/mediatek/
H A Dmediatek,dp.yaml14 MediaTek DP and eDP are different hardwares and there are some features
17 In addition, We just need to enable the power domain of DP, so the clock
18 of DP is generated by itself and we are not using other PLL to generate
/freebsd-14.2/sys/contrib/device-tree/Bindings/display/msm/
H A Ddp-controller.yaml51 - description: Link interface clock between DP and PHY
148 # AUX BUS does not exist on DP controllers
149 # Audio output also is present only on DP output
150 # p1 regions is present on DP, but not on eDP
/freebsd-14.2/sys/dev/sbni/
H A Dif_sbnivar.h43 #define DP(A) A macro
45 #define DP(A) macro
/freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/
H A DKCFI.cpp44 void print(DiagnosticPrinter &DP) const override { DP << Msg; } in print()
/freebsd-14.2/sys/kern/
H A Duipc_sem.c90 #define DP(x) printf x macro
92 #define DP(x) macro
641 DP((">>> ksem_open start, pid=%d\n", (int)td->td_proc->p_pid)); in sys_ksem_open()
816 DP((">>> kern_sem_wait entered! pid=%d\n", (int)td->td_proc->p_pid)); in kern_sem_wait()
824 DP((">>> kern_sem_wait critical section entered! pid=%d\n", in kern_sem_wait()
829 DP(("kern_sem_wait mac failed\n")); in kern_sem_wait()
833 DP(("kern_sem_wait value = %d, tryflag %d\n", ks->ks_value, tryflag)); in kern_sem_wait()
862 DP(("kern_sem_wait value post-decrement = %d\n", ks->ks_value)); in kern_sem_wait()
867 DP(("<<< kern_sem_wait leaving, pid=%d, error = %d\n", in kern_sem_wait()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreRegisterInfo.td38 def DP : Ri<13, "dp">, DwarfRegNum<[13]>;
56 R11, CP, DP, SP, LR)> {

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