Searched refs:DECODE_OPERAND_REG_7 (Results 1 – 1 of 1) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/ |
| H A D | AMDGPUDisassembler.cpp | 150 #define DECODE_OPERAND_REG_7(RegClass, OpWidth) \ macro
214 DECODE_OPERAND_REG_7(SReg_32, OPW32) in DECODE_OPERAND_REG_8()
215 DECODE_OPERAND_REG_7(SReg_32_XEXEC, OPW32) in DECODE_OPERAND_REG_8()
216 DECODE_OPERAND_REG_7(SReg_32_XM0_XEXEC, OPW32) in DECODE_OPERAND_REG_8()
217 DECODE_OPERAND_REG_7(SReg_32_XEXEC_HI, OPW32) in DECODE_OPERAND_REG_8()
218 DECODE_OPERAND_REG_7(SReg_64, OPW64) in DECODE_OPERAND_REG_8()
219 DECODE_OPERAND_REG_7(SReg_64_XEXEC, OPW64) in DECODE_OPERAND_REG_8()
220 DECODE_OPERAND_REG_7(SReg_96, OPW96) in DECODE_OPERAND_REG_8()
221 DECODE_OPERAND_REG_7(SReg_128, OPW128) in DECODE_OPERAND_REG_8()
222 DECODE_OPERAND_REG_7(SReg_256, OPW256) in DECODE_OPERAND_REG_8()
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