| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelDAGToDAG.cpp | 268 SDValue CopyToReg = in SelectInlineAsmMemoryOperand() local
272 CurDAG->getCopyFromReg(CopyToReg, dl, VReg, TL.getPointerTy(DL)); in SelectInlineAsmMemoryOperand()
297 SDValue CopyToReg = CurDAG->getCopyToReg(Op, dl, VReg, Op); in SelectInlineAsmMemoryOperand() local
299 CurDAG->getCopyFromReg(CopyToReg, dl, VReg, TL.getPointerTy(DL)); in SelectInlineAsmMemoryOperand()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 85 case ISD::CopyToReg: break; in numberRCValPredInSU()
122 case ISD::CopyToReg: NumberDeps++; break; in numberRCValSuccInSU()
444 case ISD::CopyToReg: in SUSchedulingCost()
|
| H A D | InstrEmitter.cpp | 111 if (User->getOpcode() == ISD::CopyToReg && in EmitCopyFromReg()
230 if (User->getOpcode() == ISD::CopyToReg && in CreateVirtualRegisters()
484 if (User->getOpcode() == ISD::CopyToReg && in EmitSubregNode()
1149 } else if (F->getOpcode() == ISD::CopyToReg) { in EmitMachineNode()
1214 case ISD::CopyToReg: { in EmitSpecialNode()
|
| H A D | ScheduleDAGRRList.cpp | 712 case ISD::CopyToReg: in EmitNode()
1391 if (Node->getOpcode() == ISD::CopyToReg) { in DelayForLiveRegsBottomUp()
2043 if (Opc == ISD::TokenFactor || Opc == ISD::CopyToReg) in getNodePriority()
2259 if (N->getOpcode() != ISD::CopyToReg) in unscheduledNode()
2354 Succ.getSUnit()->getNode()->getOpcode() == ISD::CopyToReg) in closestSucc()
2402 if (SuccSU->getNode() && SuccSU->getNode()->getOpcode() == ISD::CopyToReg) { in hasOnlyLiveOutUses()
2731 if (Opc == ISD::TokenFactor || Opc == ISD::CopyToReg) in canEnableCoalescing()
2970 if (N->getOpcode() == ISD::CopyToReg && in PrescheduleNodesWithMultipleUses()
|
| H A D | ScheduleDAGSDNodes.cpp | 115 if (Op != 2 || User->getOpcode() != ISD::CopyToReg) in CheckForPhysRegDependency()
431 if (SUNode->getOpcode() != ISD::CopyToReg) in BuildSchedUnits()
664 if (Latency > 1U && Use->getOpcode() == ISD::CopyToReg && in computeOperandLatency()
|
| H A D | ScheduleDAGFast.cpp | 514 if (Node->getOpcode() == ISD::CopyToReg) { in DelayForLiveRegsBottomUp()
|
| H A D | SelectionDAGDumper.cpp | 177 case ISD::CopyToReg: return "CopyToReg"; in getOperationName()
|
| H A D | SelectionDAGISel.cpp | 759 if (N->getOpcode() != ISD::CopyToReg) in ComputeLiveOutVRegInfo()
3076 case ISD::CopyToReg: in SelectCodeCommon()
|
| H A D | DAGCombiner.cpp | 2320 case ISD::CopyToReg: in visitTokenFactor()
12843 if (User->getOpcode() == ISD::CopyToReg) in ExtendUsesToFormExtLoad()
12852 if (Use.getResNo() == 0 && Use.getUser()->getOpcode() == ISD::CopyToReg) { in ExtendUsesToFormExtLoad()
|
| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 203 CopyToReg, enumerator
|
| H A D | SelectionDAG.h | 773 return getNode(ISD::CopyToReg, dl, MVT::Other, Chain,
784 return getNode(ISD::CopyToReg, dl, VTs,
793 return getNode(ISD::CopyToReg, dl, VTs,
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 342 if (N->getOpcode() == ISD::CopyToReg) { in getOperandRegClass()
645 case ISD::CopyToReg: { in Select()
2326 if (Cond.getOpcode() == ISD::CopyToReg) in isCBranchSCC()
|
| H A D | SIISelLowering.cpp | 6204 SDNode *CopyToReg = findUser(SDValue(Intr, i), ISD::CopyToReg); in LowerBRCOND() local
6205 if (!CopyToReg) in LowerBRCOND()
6210 CopyToReg->getOperand(1), in LowerBRCOND()
6214 DAG.ReplaceAllUsesWith(SDValue(CopyToReg, 0), CopyToReg->getOperand(0)); in LowerBRCOND()
12071 for (auto VectorwiseOp : {ISD::STORE, ISD::CopyToReg, ISD::CopyFromReg}) in performOrCombine()
14683 if (Node->getOpcode() == ISD::CopyToReg) { in legalizeTargetIndependentNode()
16034 if (User->getOpcode() != ISD::CopyToReg) in checkForPhysRegDependency()
|
| H A D | AMDGPUISelLowering.cpp | 678 case ISD::CopyToReg: in hasSourceMods()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 295 setOperationAction(ISD::CopyToReg, MVT::Other, Custom); in WebAssemblyTargetLowering()
1458 case ISD::CopyToReg: in LowerOperation()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelDAGToDAG.cpp | 1843 if (CCUser->getOpcode() == ISD::CopyToReg || in IsProfitableToFold()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 3223 if (UI->getOpcode() != ISD::CopyToReg || in onlyUsesZeroFlag()
3259 if (UI->getOpcode() != ISD::CopyToReg || in hasNoSignFlagUses()
3317 if (UIOpc == ISD::CopyToReg) { in hasNoCarryFlagUses()
|
| H A D | X86ISelLoweringCall.cpp | 949 if (Copy->getOpcode() == ISD::CopyToReg) { in isUsedByReturnOnly()
|
| H A D | X86ISelLowering.cpp | 22410 if (U->getOpcode() != ISD::CopyToReg && in isProfitableToUseFlagOp()
47746 case ISD::CopyToReg: in combineCompareEqual()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 2949 case ISD::CopyToReg: in isI32Insn()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 3334 if (!Glued || Glued->getOpcode() != ISD::CopyToReg) in usesAllOnesMask()
|
| H A D | RISCVISelLowering.cpp | 18766 if (Copy->getOpcode() != ISD::CopyToReg) { in isUsedByReturnOnly()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 3995 if (Copy->getOpcode() != ISD::CopyToReg) in isUsedByReturnOnly()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 512 if (Use->getOpcode() == ISD::CopyToReg) in hasNoVMLxHazardUse()
|
| H A D | ARMISelLowering.cpp | 3361 if (Copy->getOpcode() == ISD::CopyToReg) { in isUsedByReturnOnly()
3372 if (U->getOpcode() != ISD::CopyToReg) in isUsedByReturnOnly()
3399 if (Copy->getOpcode() != ISD::CopyToReg || !Copy->hasNUsesOfValue(1, 0)) in isUsedByReturnOnly()
|