Searched refs:Const1 (Results 1 – 4 of 4) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 936 SDValue Const1; in performORCombine() local
939 Const1 = DAG.getConstant(SMPos0, DL, MVT::i32); in performORCombine()
2336 SDValue Const1 = DAG.getConstant(1, DL, MVT::i32); in lowerFCOPYSIGN32() local
2345 Const1); in lowerFCOPYSIGN32()
2349 Const1); in lowerFCOPYSIGN32()
2384 SDValue Const1 = DAG.getConstant(1, DL, MVT::i32); in lowerFCOPYSIGN64() local
2412 SDValue SllX = DAG.getNode(ISD::SHL, DL, TyX, X, Const1); in lowerFCOPYSIGN64()
2439 SDValue Res, Const1 = DAG.getConstant(1, DL, MVT::i32); in lowerFABS32() local
2449 Op.getOperand(0), Const1); in lowerFABS32()
2460 Res = DAG.getNode(ISD::SRL, DL, MVT::i32, SllX, Const1); in lowerFABS32()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 3140 SDValue Const1 = DAG.getConstant(1, DL, MVT::i64); in lowerEXTRACT_VECTOR_ELT() local
3141 SDValue HalfIdx = DAG.getNode(ISD::SRL, DL, MVT::i64, {Idx, Const1}); in lowerEXTRACT_VECTOR_ELT()
3144 SDValue AndIdx = DAG.getNode(ISD::AND, DL, MVT::i64, {Idx, Const1}); in lowerEXTRACT_VECTOR_ELT()
3145 SDValue Shift = DAG.getNode(ISD::XOR, DL, MVT::i64, {AndIdx, Const1}); in lowerEXTRACT_VECTOR_ELT()
3198 SDValue Const1 = DAG.getConstant(1, DL, MVT::i64); in lowerINSERT_VECTOR_ELT() local
3199 SDValue HalfIdx = DAG.getNode(ISD::SRL, DL, MVT::i64, {Idx, Const1}); in lowerINSERT_VECTOR_ELT()
3202 SDValue AndIdx = DAG.getNode(ISD::AND, DL, MVT::i64, {Idx, Const1}); in lowerINSERT_VECTOR_ELT()
3203 SDValue Shift = DAG.getNode(ISD::XOR, DL, MVT::i64, {AndIdx, Const1}); in lowerINSERT_VECTOR_ELT()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | CodeGenPrepare.cpp | 8323 bool Const1 = isa<ConstantInt>(Op1) || isa<ConstantFP>(Op1) || in optimizeInst() local
8325 if (Const0 || Const1) { in optimizeInst()
8326 if (!Const0 || !Const1) { in optimizeInst()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 2404 auto Const1 = B.buildConstant(S32, ExpBits); in extractF64Exponent() local
2409 .addUse(Const1.getReg(0)); in extractF64Exponent()
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