| /freebsd-14.2/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/ |
| H A D | IdenticalExprChecker.cpp | 136 const Expr *Cond1 = I->getCond(); in VisitIfStmt() local
140 if (isIdenticalStmt(AC->getASTContext(), Cond1, Cond2, false)) { in VisitIfStmt()
141 SourceRange Sr = Cond1->getSourceRange(); in VisitIfStmt()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | LibCallsShrinkWrap.cpp | 88 auto Cond1 = createCond(BBBuilder, Arg, Cmp, Val); in createOrCond() local
89 return BBBuilder.CreateOr(Cond1, Cond2); in createOrCond()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | IRBuilder.h | 1670 Value *CreateLogicalAnd(Value *Cond1, Value *Cond2, const Twine &Name = "") {
1672 return CreateSelect(Cond1, Cond2,
1676 Value *CreateLogicalOr(Value *Cond1, Value *Cond2, const Twine &Name = "") {
1678 return CreateSelect(Cond1, ConstantInt::getAllOnesValue(Cond2->getType()),
1682 Value *CreateLogicalOp(Instruction::BinaryOps Opc, Value *Cond1, Value *Cond2,
1686 return CreateLogicalAnd(Cond1, Cond2, Name);
1688 return CreateLogicalOr(Cond1, Cond2, Name);
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | LICM.cpp | 2401 Value *Cond1, *Cond2; in hoistMinMax() local
2402 if (match(&I, m_LogicalOr(m_Value(Cond1), m_Value(Cond2)))) { in hoistMinMax()
2404 } else if (match(&I, m_LogicalAnd(m_Value(Cond1), m_Value(Cond2)))) { in hoistMinMax()
2429 if (!MatchICmpAgainstInvariant(Cond1, P1, LHS1, RHS1) || in hoistMinMax()
2464 eraseInstruction(*cast<Instruction>(Cond1), SafetyInfo, MSSAU); in hoistMinMax()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | IfConversion.cpp | 1784 SmallVector<MachineOperand, 4> *Cond1 = &BBI.BrCond; in IfConvertDiamondCommon() local
1798 std::swap(Cond1, Cond2); in IfConvertDiamondCommon()
1962 PredicateBlock(*BBI1, MBB1.end(), *Cond1, &RedefsByFalse); in IfConvertDiamondCommon()
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| H A D | ModuloSchedule.cpp | 330 SmallVector<MachineOperand, 4> Cond1; in generateEpilog() local
331 TII->insertBranch(*LastEpilogBB, LoopExitBB, nullptr, Cond1, DebugLoc()); in generateEpilog()
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| H A D | CodeGenPrepare.cpp | 8654 Value *Cond1, *Cond2; in splitBranchCondition() local
8656 m_LogicalAnd(m_OneUse(m_Value(Cond1)), m_OneUse(m_Value(Cond2))))) in splitBranchCondition()
8658 else if (match(LogicOp, m_LogicalOr(m_OneUse(m_Value(Cond1)), in splitBranchCondition()
8670 if (!IsGoodCond(Cond1) || !IsGoodCond(Cond2)) in splitBranchCondition()
8684 Br1->setCondition(Cond1); in splitBranchCondition()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Coroutines/ |
| H A D | CoroSplit.cpp | 1383 auto *Cond1 = dyn_cast<ConstantInt>(CondCmp->getOperand(1)); in simplifyTerminatorLeadingToRet() local
1384 if (!Cond0 || !Cond1) in simplifyTerminatorLeadingToRet()
1391 CondCmp->getPredicate(), Cond0, Cond1, DL)); in simplifyTerminatorLeadingToRet()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSelect.cpp | 3203 const APInt *Cond1, Value *CtlzOp, in isSafeToRemoveBitCeilSelect() argument
3226 CmpInst::getInversePredicate(Pred), *Cond1); in isSafeToRemoveBitCeilSelect()
3303 const APInt *Cond1; in foldBitCeil() local
3305 if (!match(SI.getCondition(), m_ICmp(Pred, m_Value(Cond0), m_APInt(Cond1)))) in foldBitCeil()
3320 !isSafeToRemoveBitCeilSelect(Pred, Cond0, Cond1, CtlzOp, BitWidth, in foldBitCeil()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 5790 SDValue Cond1 = N->getOperand(0); in WidenVecRes_Select() local
5791 EVT CondVT = Cond1.getValueType(); in WidenVecRes_Select()
5804 Cond1 = GetWidenedVector(Cond1); in WidenVecRes_Select()
5817 if (Cond1.getValueType() != CondWidenVT) in WidenVecRes_Select()
5818 Cond1 = ModifyToType(Cond1, CondWidenVT); in WidenVecRes_Select()
5825 return DAG.getNode(Opcode, SDLoc(N), WidenVT, Cond1, InOp1, InOp2, in WidenVecRes_Select()
5827 return DAG.getNode(Opcode, SDLoc(N), WidenVT, Cond1, InOp1, InOp2); in WidenVecRes_Select()
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| H A D | DAGCombiner.cpp | 11478 SDValue Cond1 = N0.getOperand(1); in foldVSelectToSignBitSplatMask() local
11485 if (CC == ISD::SETLT && isNullOrNullSplat(Cond1)) in foldVSelectToSignBitSplatMask()
11487 else if (CC == ISD::SETGT && isAllOnesOrAllOnesSplat(Cond1)) in foldVSelectToSignBitSplatMask()
11571 SDValue Cond1 = N0->getOperand(1); in visitSELECT() local
11573 DAG.getNode(ISD::SELECT, DL, N1.getValueType(), Cond1, N1, N2, Flags); in visitSELECT()
11584 SDValue Cond1 = N0->getOperand(1); in visitSELECT() local
11586 Cond1, N1, N2, Flags); in visitSELECT()
11636 SDValue Cond0 = N0.getOperand(0), Cond1 = N0.getOperand(1); in visitSELECT() local
11645 combineMinNumMaxNum(DL, VT, Cond0, Cond1, N1, N2, CC)) in visitSELECT()
11657 auto *NotC = dyn_cast<ConstantSDNode>(Cond1); in visitSELECT()
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | ValueTracking.cpp | 3051 const Value *Cond1 = SI1->getCondition(); in isNonEqualSelect() local
3053 if (Cond1 == Cond2) in isNonEqualSelect()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 45129 SDValue Cond1 = Cond.getOperand(1); in combineSelect() local
45151 if (LHS == Cond0 && RHS == Cond1) { in combineSelect()
45155 Cond = DAG.getSetCC(SDLoc(Cond), CondVT, Cond0, Cond1, NewCC); in combineSelect()
45160 Cond = DAG.getSetCC(SDLoc(Cond), CondVT, Cond0, Cond1, NewCC); in combineSelect()
45179 Cond1 == InnerSetCC.getOperand(1)) { in combineSelect()
45189 Cond = DAG.getSetCC(DL, CondVT, Cond0, Cond1, NewCC); in combineSelect()
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