| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InterleavedAccess.cpp | 235 static constexpr int Concat[] = { variable
315 Builder.CreateShuffleVector(Temp[2 * i], Temp[2 * i + 1], Concat); in reorderSubVector()
422 reorderSubVector(VT, TransposedMatrix, VecOut, ArrayRef(Concat, 16), NumOfElm, in interleave8bitStride4()
533 InVec[j * 6 + i], InVec[j * 6 + i + 3], ArrayRef(Concat, 32)); in concatSubVector()
539 Vec[i] = Builder.CreateShuffleVector(Vec[i], Vec[i + 3], Concat); in concatSubVector()
|
| H A D | X86PartialReduction.cpp | 208 Value *Concat = Builder.CreateShuffleVector(MAdd, Zero, ConcatMask); in tryMAddReplacement() local
210 Mul->replaceAllUsesWith(Concat); in tryMAddReplacement()
|
| H A D | X86ISelLowering.cpp | 40804 SDValue Concat = DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, N0.getOperand(0), in combineShuffleOfConcatUndef() local
40806 return DAG.getVectorShuffle(VT, DL, Concat, DAG.getUNDEF(VT), Mask); in combineShuffleOfConcatUndef()
47396 SDValue Concat = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v16i32, in combineVectorPack() local
47398 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), VT, Concat); in combineVectorPack()
48474 SDValue Concat = DAG.getNode(ISD::CONCAT_VECTORS, dl, SrcVT, in combineScalarAndWithMaskSetcc() local
48477 return DAG.getZExtOrTrunc(DAG.getBitcast(IntVT, Concat), dl, VT); in combineScalarAndWithMaskSetcc()
55511 SDValue Concat = splitVectorIntBinary(InVecBC, DAG); in combineEXTRACT_SUBVECTOR() local
55513 DAG.getBitcast(InVecVT, Concat), N->getOperand(1)); in combineEXTRACT_SUBVECTOR()
|
| H A D | X86InstrAVX512.td | 12267 // Concat & Shift
|
| /freebsd-14.2/crypto/openssl/doc/man7/ |
| H A D | EVP_KDF-X942-CONCAT.pod | 5 EVP_KDF-X942-CONCAT - The X942 Concat EVP_KDF implementation
|
| H A D | EVP_KDF-SS.pod | 12 SSKDF is also informally referred to as 'Concat KDF'.
|
| /freebsd-14.2/contrib/googletest/googlemock/test/ |
| H A D | gmock-more-actions_test.cc | 1296 ConcatImplActionP3<std::string, T1, T2> Concat(const std::string& a, T1 b, in Concat() function
1315 ConcatImplActionP3<T1, int, T2> Concat(T1 a, int b, T2 c) { in Concat() function
1320 Action<const std::string()> a1 = Concat("Hello", "1", 2); in TEST()
1323 a1 = Concat(1, 2, 3); in TEST()
|
| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizationArtifactCombiner.h | 600 Register findValueFromConcat(GConcatVectors &Concat, unsigned StartBit, in findValueFromConcat() argument
605 Register Src1Reg = Concat.getSourceReg(0); in findValueFromConcat()
618 Register SrcReg = Concat.getReg(StartSrcIdx); in findValueFromConcat()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 2662 auto Concat = N->getOperand(0); in performVectorTruncZeroCombine() local
2663 if (Concat.getValueType() != MVT::v4f64) in performVectorTruncZeroCombine()
2666 auto Source = Concat.getOperand(0); in performVectorTruncZeroCombine()
2670 if (!IsZeroSplat(Concat.getOperand(1)) || in performVectorTruncZeroCombine()
2671 Concat.getOperand(1).getValueType() != MVT::v2f64) in performVectorTruncZeroCombine()
|
| /freebsd-14.2/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | CodeGenRegisters.cpp | 515 CodeGenSubRegIndex *Concat = RegBank.getConcatSubRegIndex(Parts); in computeSecondarySubRegs() local
517 std::make_pair(Concat, Cand); in computeSecondarySubRegs()
525 SubReg2Idx.insert(std::make_pair(Cand, Concat)); in computeSecondarySubRegs()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/TableGen/ |
| H A D | Record.cpp | 1022 SmallString<80> Concat(I0->getValue()); in ConcatStringInits() local
1023 Concat.append(I1->getValue()); in ConcatStringInits()
1025 I0->getRecordKeeper(), Concat, in ConcatStringInits()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 6195 auto Concat = B.buildBuildVector(PackedTy, {VData0, VData1}); in legalizeImageIntrinsic() local
6196 MI.getOperand(2).setReg(Concat.getReg(0)); in legalizeImageIntrinsic()
6236 auto Concat = B.buildConcatVectors( in legalizeImageIntrinsic() local
6238 PackedRegs[NSAMaxSize - 1] = Concat.getReg(0); in legalizeImageIntrinsic()
6242 auto Concat = B.buildConcatVectors(PackedAddrTy, PackedRegs); in legalizeImageIntrinsic() local
6243 PackedRegs[0] = Concat.getReg(0); in legalizeImageIntrinsic()
|
| H A D | SIISelLowering.cpp | 6803 SDValue Concat = InsertLo ? in lowerINSERT_VECTOR_ELT() local
6807 return DAG.getNode(ISD::BITCAST, SL, VecVT, Concat); in lowerINSERT_VECTOR_ELT()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 5426 SDValue Concat = in PromoteNode() local
5429 SDValue CvtVec = DAG.getNode(ISD::BITCAST, SL, OVT, Concat); in PromoteNode()
5550 SDValue Concat = DAG.getNode(ISD::CONCAT_VECTORS, SL, NVT, NewElts); in PromoteNode() local
5551 SDValue CvtVec = DAG.getNode(ISD::BITCAST, SL, OVT, Concat); in PromoteNode()
|
| H A D | DAGCombiner.cpp | 23408 SDValue Concat = DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(N), in visitBUILD_VECTOR() local
23410 return DAG.getBitcast(VT, Concat); in visitBUILD_VECTOR()
26780 auto ConcatWithConstantOrUndef = [](SDValue Concat) { in SimplifyVBinOp() argument
26781 return Concat.getOpcode() == ISD::CONCAT_VECTORS && in SimplifyVBinOp()
26782 all_of(drop_begin(Concat->ops()), [](const SDValue &Op) { in SimplifyVBinOp()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 5252 MachineInstr *Concat = in selectShuffleVector() local
5254 if (!Concat) { in selectShuffleVector()
5265 {Concat->getOperand(0).getReg(), IndexLoad->getOperand(0).getReg()}); in selectShuffleVector()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAndOrXor.cpp | 3399 if (Instruction *Concat = matchOrConcat(I, Builder)) in visitOr() local
3400 return replaceInstUsesWith(I, Concat); in visitOr()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 9721 SDValue Concat = DAG.getNode(ISD::CONCAT_VECTORS, DL, ConcatVT, in lowerVECTOR_DEINTERLEAVE() local
9732 getDeinterleaveViaVNSRL(DL, VecVT, Concat, true, Subtarget, DAG); in lowerVECTOR_DEINTERLEAVE()
9734 getDeinterleaveViaVNSRL(DL, VecVT, Concat, false, Subtarget, DAG); in lowerVECTOR_DEINTERLEAVE()
9749 Concat, EvenIdx, Passthru, Mask, VL); in lowerVECTOR_DEINTERLEAVE()
9751 Concat, OddIdx, Passthru, Mask, VL); in lowerVECTOR_DEINTERLEAVE()
9807 SDValue Concat = DAG.getNode(ISD::CONCAT_VECTORS, DL, ConcatVT, in lowerVECTOR_INTERLEAVE() local
9838 Concat, Idx, DAG.getUNDEF(ConcatVT), TrueMask, VL); in lowerVECTOR_INTERLEAVE()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 12307 if (SDValue Concat = tryFormConcatFromShuffle(Op, DAG)) in LowerVECTOR_SHUFFLE() local
12308 return Concat; in LowerVECTOR_SHUFFLE()
16769 SDValue Concat = in performUADDVZextCombine() local
16775 return DAG.getNode(AArch64ISD::UADDLV, SDLoc(A), VT, Concat); in performUADDVZextCombine()
16778 DAG.getNode(AArch64ISD::UADDLV, SDLoc(A), MVT::v4i32, Concat); in performUADDVZextCombine()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 12695 SDValue Concat = DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(N), ConcatVT, in AddCombineVUZPToVPADDL() local
12697 Ops.push_back(Concat); in AddCombineVUZPToVPADDL()
|